XR21B1421 Datasheet, PDF (30/50 Pages) Exar Corporation – Enhanced 1-Ch Full-Speed

Table 11: GPIO Mode 0 Bit Positions
Bit
Description
7 Reserved
6:5 RS485_SEL
00: GPIO3/RS485 pin functions as GPIO
01: GPIO3/RS485 pin functions as auto RS-485 half-duplex enable
(RS485_PIN = ’1’)
10: GPIO3/RS485 pin asserted during UART transmit only with address
match (RS485_PIN = ’1’)
11: Reserved
4 RS485_PIN
0: Selected auto RS-485 half-duplex enable pin is GPIO1/RTS#/RS485,
function determined by MODEM_SEL field
1: Selected auto RS-485 half-duplex enable pin is GPIO3/RS485, func-
tion determined by RS485_SEL field
3 RS485_POL
0: Auto RS-485 half-duplex enable active low
1: Auto RS-485 half-duplex enable active high
2:0 MODEM_SEL
With MODEM_SEL = "001" for RTS/CTS flow control, H/W flow control
must also be enabled in UART_CONFIG report (not default).
000: No GPIO pins used for either RTS/CTS or DTR/DSR hardware
flow control
001: GPIO1 and GPIO2 used for hardware auto-RTS/CTS flow control -
default
010: GPIO8 and GPIO9 used for hardware auto-DTR/DSR flow control
011: GPIO1/RTS#/RS485 pin asserted during UART transmit
(RS485_PIN = ’0’)
100: GPIO1/RTS#/RS485 pin asserted during UART transmit only with
address match (RS485_PIN = ’0’)
101 to 111: Reserved
Table 12: GPIO Mode 1 Bit Positions
Bit
Description
7 RXT_EN
0: Disable Receive toggle output function (pin reverts to GPIO function-
ality)
1: Enable Receive toggle output function
6 TXT_EN
0: Disable Transmit toggle output function (pin reverts to GPIO function-
ality)
1: Enable Transmit toggle output function
5:1 Reserved
0 CLK_EN
0: Disable Clock output function (pin reverts to GPIO functionality)
1: Enable Clock output function
XR21B1421
© 2014 Exar Corporation
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exar.com/XR21B1421
Rev 1B