XR21B1421 Datasheet, PDF (6/50 Pages) Exar Corporation – Enhanced 1-Ch Full-Speed

XR21B1421
24-pin QFN
Pin No.
Pin Name
15
GPIO6/CD#
16
NC
17
USB_STAT2
18
GPIO5/RXT
19
GPIO4/TXT
20
RX
21
TX
22
GPIO3/RS485
23
GPIO2/CTS#
24
GPIO1/RTS#/RS485
Center
Pad
GND
Type
I/O
OD
I/O
I/O
I
O
I/O
I/O
I/O
PWR
Description
General purpose I/O, or UART Carrier-Detect input (active low). Defaults to GPIO input with inter-
nal pull-up.
No Connect
This pin has the same functionality as the USB_STAT1 pin. However, the default output for this
pin is active low polarity, asserted whenever the XR21B1421 is placed into a suspended state.
This default may be changed via the PIN_CFG_USB_STAT2 register.
General purpose I/O, or UART receive indicator. Defaults to receive indicator push-pull output.
When configured as receive indicator, this pin will toggle at ~10 Hz intervals while the UART is
receiving data.
General purpose I/O, or UART transmit indicator. Defaults to transmit indicator push-pull output.
When configured as transmit indicator, this pin will toggle at ~10 Hz intervals during UART data
transmission.
UART Receive Data.
UART Transmit Data.
General purpose I/O, or auto RS-485 half-duplex enable. Defaults to active high push-pull output
Auto RS-485 half-duplex enable.
General purpose I/O, or UART Clear-to-Send input (active low). Defaults to CTS input with inter-
nal pull-up. See “Automatic RTS/CTS Hardware Flow Control” on page 15.
General purpose I/O, or UART Request-to-Send output (active low) or auto. RS-485 half-duplex
enable. Defaults to open drain RTS output. See “GET / SET_GPIO_CONFIG” on page 28 and
“GET / SET_PIN_CONFIG” on page 41.
The center pad on the back side of the QFN package is metallic and should be connected to
GND on the PCB. The thermal pad size on the PCB should be the approximate size of this center
pad and should be solder mask defined. The solder mask opening should be at least 0.0025"
inwards from the edge of the PCB thermal pad.
1. Pin type: I=Input, O=Push-pull Output, I/O= Input/output, PWR=Power, OD=Open Drain Output with weak internal pull-up
2. All GPIO pins as well as USB_STAT1 and USB_STAT2 may be configured for a variety of pin type options using the GPIO_MODE register or by writing
to the OTP using XR_SET_OTP.
3. All enabled pull-up and pull-down resistors are maintained during USB suspend state.
4. Pin configurations set using XR_SET_OTP are enabled following the next power up reset and are permanent. During USB bus reset, resistors are dis-
abled and re-enabled after bus reset is deasserted. Pin configurations set using the GPIO_MODE register will be lost after POR or USB bus reset.
© 2014 Exar Corporation
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exar.com/XR21B1421
Rev 1B