XR16M890IL32-0C Datasheet, PDF (8/63 Pages) Exar Corporation – UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS

XR16M890
UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
Pin Description
REV. 1.0.0
NAME
EN485#
QFN-32 QFN-40 TQFP-48
TYPE
PIN#
PIN#
PIN#
DESCRIPTION
30
13
16
I _{Enable Auto RS-485 Half-Duplex Mode. This pin is sampled upon}
power-up. If this pin is HIGH, then the RTS# output can be used for
Auto RTS Hardware Flow Control or as a general purpose output. If
this pin is LOW, then the RTS# output is the Auto RS-485 Half-
Duplex direction control pin.
In the QFN-32 package, this pin is the A1 pin when in the Intel/
Motorola mode.
ENIR#
29
38
46
I _{Enable IR Mode. This pin is sampled upon power-up. If this pin is}
HIGH, then the TX output and RX input will behave as the UART
transmit data output and UART receive data input. If this pin is
LOW, then the TX output and RX input will behave as the infrared
encoder data output and the infrared receive data input.
In the Intel/Motorola mode, this pin is the A2 pin for all packages.
SLEEP/
32
11
14
I/O _{Sleep / Power Down pin. This pin powers up as the SLEEP input.}
PWRDN#
The SLEEP input can force the UART to enter into the sleep mode
(16/68#)
after the next byte transmitted or received without meeting any of
the sleep mode conditions. See ”Section 1.20.2, Sleep Mode -
SLEEP pin” on page 25.
This pin can also be configured as an output pin which can be used
to indicate to the CPU that the UART has entered the sleep mode.
This output can also be used to power down other devices.
VCC_CORE 25
VCC_BUS 12
VCC_UART 20
VCC_GPIO
-
GND
GND
11
Center
Pad
34
15
24
19
14, 25
Center
Pad
42
18
32
24
17, 33
Center
Pad
In the QFN-32 package, this pin is the 16/68# input pin when the
VLIO mode is disabled.
Pwr _{1.62V to 3.63V VCC for the core. This supply voltage is used for the}
core logic including the crystal oscillator circuit.
Pwr _{1.62V to 3.63V VCC for bus interface signals.}
This supply voltage pin will determine the I/O levels of the CPU bus
interface signals.
Pwr _{1.62V to 3.63V VCC for the UART signals.}
This supply voltage pin will determine the I/O levels of the UART I/O
signals including GPIO[3:0].
Pwr _{1.62V to 3.63V VCC for the GPIO signals.}
This supply voltage pin will determine the I/O levels of the
GPIO[15:4] signals.
Pwr _{Power supply common, ground.}
Pwr _{The center pad on the backside of the QFN package is metallic and}
should be connected to GND on the PCB. The thermal pad size on
the PCB should be the approximate size of this center pad and
should be solder mask defined. The solder mask opening should be
at least 0.0025" inwards from the edge of the PCB thermal pad.
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
8