XR16M890IL32-0C Datasheet, PDF (25/63 Pages) Exar Corporation – UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS

XR16M890
REV. 1.0.0
UART WITH 128-BYTE FIFO AND INTEGRATED LEVEL SHIFTERS
1.20 Sleep Mode with Auto Wake-Up
The M890 supports low voltage system designs, hence, a sleep mode with auto wake-up feature is included to
reduce its power consumption when the chip is not actively used.
1.20.1 Sleep mode - IER bit-4
All of these conditions must be satisfied for the M890 to enter sleep mode:
■ no interrupts pending (ISR bit-0 = 1)
■ sleep mode is enabled (IER bit-4 = 1)
■ modem inputs are not toggling (MSR bits 0-3 = 0)
■ RX input pin is idling HIGH in normal mode or LOW in infrared mode
■ divisor is non-zero
■ TX and RX FIFOs are empty
The M890 stops its crystal oscillator to conserve power in the sleep mode. User can check the XTAL2 pin for
no clock output as an indication that the device has entered the sleep mode.
The M890 resumes normal operation by any of the following:
■ a receive data start bit transition (HIGH to LOW)
■ a data byte is loaded to the transmitter, THR or FIFO
■ a change of logic state on any of the modem or general purpose serial inputs: CTS#, DSR#, CD#, RI#
If the M890 is awakened by any one of the above conditions, it will return to the sleep mode automatically after
all interrupting conditions have been serviced and cleared. If the M890 is awakened by the modem inputs, a
read to the MSR is required to reset the modem inputs. In any case, the sleep mode will not be entered while
an interrupt is pending from any channel. The M890 will stay in the sleep mode of operation until it is disabled
by setting IER bit-4 to a logic 0.
A word of caution: owing to the starting up delay of the crystal oscillator after waking up from sleep mode, the
first few receive characters may be lost. Also, make sure the RX pin is idling HIGH or “marking” condition
during sleep mode. This may not occur when the external interface transceivers (RS-232, RS-485 or another
type) are also put to sleep mode and cannot maintain the “marking” condition. To avoid this, the system design
engineer can use a 47k ohm pull-up resistor on each of the RX input.
1.20.2 Sleep Mode - SLEEP pin
The M890 has a new pin called the SLEEP pin that can be used instead of setting IER bit-4=1. The M890 will
enter the sleep mode when:
■ the current byte in the TSR has completely shifted out
■ the current byte in the RSR has been completely received
Under this condition, there could be data in the TX and RX FIFOs. Any data that is the TX and RX FIFOs when
the SLEEP pin is asserted will not be affected. The only data that will be lost is any data that is still being
received on the RX pin. The M890 will only wake up after the SLEEP pin has been de-asserted.
1.20.3 Wake-up Interrupt
The M890 has the wake up interrupt. By setting the FCR bit-3, wake up interrupt is enabled or disabled. The
default status of wake up interrupt is disabled. Please See ”Section 3.5, FIFO Control Register (FCR) -
Write-Only” on page 34.
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