XR16M654 Datasheet, PDF (8/58 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO

XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
Pin Description
REV. 1.0.0
NAME
48-QFN
PIN #
64-LQFP 68-PLCC 80-LQFP 100-QFP
PIN #
PIN#
PIN #
PIN #
TYPE
DESCRIPTION
FSRS#
-
-
-
-
76
I FIFO Status Register Select (active low
input with internal pull-up).
The content of the FSTAT register is placed
on the data bus when this pin becomes
active. However it should be noted, D0-D3
contain the inverted logic states of TXRDY#
A-D pins, and D4-D7 the logic states (un-
inverted) of RXRDY# A-D pins. A valid
address is not required when reading this
status register.
MODEM OR SERIAL I/O INTERFACE
TXA
6
8
17
10
14
O UART channels A-D Transmit Data and
TXB
8
10
19
12
16
TXC
28
39
51
50
65
TXD
30
41
53
52
67
infrared transmit data. Standard transmit
and receive interface is enabled when
MCR[6] = 0. In this mode, the TX signal will
be a logic 1 during reset, or idle (no data).
Infrared IrDA transmit and receive interface
is enabled when MCR[6] = 1. In the Infra-
red mode, the inactive state (no data) for
the Infrared encoder/decoder interface is a
logic 0.
IRTXA
-
-
-
-
6
O UART channel A-D Infrared Transmit Data.
IRTXB
-
-
-
-
24
IRTXC
-
-
-
-
57
IRTXD
-
-
-
-
75
The inactive state (no data) for the Infrared
encoder/decoder interface is LOW.
Regardless of the logic state of MCR bit-6,
this pin will be operating in the Infrared
mode.
RXA
48
62
7
77
97
I UART channel A-D Receive Data or infra-
RXB
13
20
29
25
34
RXC
22
29
41
37
47
red receive data. Normal receive data input
must idle HIGH.
RXD
36
51
63
65
85
RTSA#
3
5
14
7
11
O UART channels A-D Request-to-Send
RTSB#
11
13
22
15
19
RTSC#
25
36
48
47
62
RTSD#
33
44
56
55
70
(active low) or general purpose output. This
output must be asserted prior to using auto
RTS flow control, see EFR[6], MCR[1], and
IER[6]. Also see Figure 12. If these out-
puts are not used, leave them unconnected.
CTSA#
1
2
11
4
8
I UART channels A-D Clear-to-Send (active
CTSB#
12
16
25
18
22
low) or general purpose input. It can be
CTSC#
23
33
45
44
59
CTSD#
35
47
59
58
73
used for auto CTS flow control, see EFR[7],
and IER[7]. Also see Figure 12. These
inputs should be connected to VCC when
not used.
DTRA#
-
DTRB#
-
DTRC#
-
DTRD#
-
3
12
5
9
O UART channels A-D Data-Terminal-Ready
15
24
17
21
34
46
45
60
46
58
57
72
(active low) or general purpose output. If
these outputs are not used, leave them
unconnected.
8