XR16M654 Datasheet, PDF (26/58 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO

XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
REV. 1.0.0
3.0 UART INTERNAL REGISTERS
Each UART channel in the M654 has its own set of configuration registers selected by address lines A0, A1
and A2 with a specific channel selected (See Table 1 and Table 2). The complete register set is shown on
Table 9 and Table 10.
.
TABLE 9: UART CHANNEL A AND B UART INTERNAL REGISTERS
A2,A1,A0 ADDRESSES
REGISTER
READ/WRITE
COMMENTS
16C550 COMPATIBLE REGISTERS
0 00
RHR - Receive Holding Register
THR - Transmit Holding Register
Read-only
Write-only
LCR[7] = 0
0 00
DLL - Divisor LSB
Read/Write
0 01
DLM - Divisor MSB
Read/Write
LCR[7] = 1, LCR ≠ 0xBF
0 10
DLD - Divisor Fractional
Read/Write
0 01
0 10
IER - Interrupt Enable Register
ISR - Interrupt Status Register
FCR - FIFO Control Register
Read/Write
Read-only
Write-only
LCR[7] = 0
0 11
LCR - Line Control Register
Read/Write
1 00
MCR - Modem Control Register
Read/Write
1 01
1 10
LSR - Line Status Register
MSR - Modem Status Register
Read-only
Read-only
LCR[7] = 0
1 11
SPR - Scratch Pad Register
Read/Write
ENHANCED REGISTERS
0 10
EFR - Enhanced Function Reg
Read/Write
1 00
Xon-1 - Xon Character 1
Read/Write
1 01
Xon-2 - Xon Character 2
Read/Write
LCR = 0xBF
1 10
Xoff-1 - Xoff Character 1
Read/Write
1 11
Xoff-2 - Xoff Character 2
Read/Write
X XX
FSTAT - FIFO Status Register
Read-only
FSRS# pin is LOW
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