XR16M654 Datasheet, PDF (5/58 Pages) Exar Corporation – 1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO

REV. 1.0.0
ORDERING INFORMATION
PART NUMBER
XR16M654IJ68
XR16M654IV64
XR16M654DIV64
XR16M654IQ100
XR16M654IL48
XR16M654IV80
XR16M654/654D
1.62V TO 3.63V QUAD UART WITH 64-BYTE FIFO
PACKAGE
68-Lead PLCC
64-Lead LQFP
64-Lead LQFP
100-Lead QFP
48-pin QFN
80-Lead LQFP
OPERATING TEMPERATURE
RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
DEVICE STATUS
Active
Active
Active
Active
Active
Active
PIN DESCRIPTIONS
Pin Description
NAME
48-QFN
PIN #
64-LQFP 68-PLCC 80-LQFP 100-QFP
PIN #
PIN#
PIN #
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
15
22
32
28
37
I Address data lines [2:0]. These 3 address
A1
16
23
33
29
38
A0
17
24
34
30
39
lines select one of the internal registers in
UART channel A-D during a data bus trans-
action.
D7
46
60
5
75
95
I/O Data bus lines [7:0] (bidirectional).
D6
45
59
4
74
94
D5
44
58
3
73
93
D4
43
57
2
72
92
D3
42
56
1
71
91
D2
41
55
68
70
90
D1
40
54
67
69
89
D0
39
53
66
68
88
IOR#
29
40
52
51
66
I When 16/68# pin is HIGH, the Intel bus
(VCC)
interface is selected and this input becomes
read strobe (active low). The falling edge
instigates an internal read cycle and
retrieves the data byte from an internal reg-
ister pointed by the address lines [A2:A0],
puts the data byte on the data bus to allow
the host processor to read it on the rising
edge.
When 16/68# pin is LOW, the Motorola bus
interface is selected and this input is not
used and should be connected to VCC.
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