English
Language : 

XRT94L33_06 Datasheet, PDF (67/465 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
XRT94L33
Rev.1.2.0.
AD15
AC15
AG16
STS1TXA_D1_2
TXHDLCDAT_1_2
TXGFC_2
STS1TXA_D2_2
TXHDLCDAT_2_2
TXCELLTXED_2
STS1TXA_D3_2
TXHDLCDAT_3_2
SSI_NEG
I
TTL
Transmit STS-1 Telecom Bus – Channel 2 – Input Data
Bus pin number 1:
The exact function of this pin depends upon whether the STS-
1 Telecom Bus Interface, associated with Channel 1 is
enabled or not.
If STS-1 Telecom Bus (Channel 2) has been enabled –
STS-1 Transmit Telecom Bus – Input Data Bus pin number 1:
This input pin along with “STS1TXA_D_2[7:2]” and
“STS1TXA_D0_2 function as the “STS-1 Transmit (Add)
Telecom Bus – Input Data Bus for Channel 2. The STS-1
Telecom Bus interface will sample and latch this pin upon the
falling edge of “STS1TXA_CK_2”.
TXHDLCDAT_1_2 (Transmit HDLC block data – Channel 2
– Input data pin 1)
TXGFC_2 (Transmit GFC data – Channel 2)
I/O TTL/CMOS Transmit STS-1 Telecom Bus – Channel 2 – Input Data
Bus pin number 2:
The exact function of this pin depends upon whether the STS-
1 Telecom Bus Interface, associated with Channel 2 is
enabled or not.
If STS-1 Telecom Bus (Channel 2) has been enabled –
STS-1 Transmit Telecom Bus – Input Data Bus pin number 2:
STS1TXA_D2_2
This input pin along with “STS1TXA_D_2[7:3]” and
“STS1TXA_D_2[1:0] function as the “STS-1 Transmit (Add)
Telecom Bus – Input Data Bus for Channel 2. The STS-1
Telecom Bus interface will sample and latch this pin upon the
falling edge of “STS1TXA_CK_2”.
TXHDLCDAT_2_2 (Transmit HDLC block data – Channel 2
– Input data pin 2)
TXCELLTXED_2 (Cell Transmitted – Channel 2)
I/O TTL/CMOS Transmit STS-1 Telecom Bus – Channel 2 – Input Data
Bus pin number 3:
The exact function of this pin depends upon whether the STS-
1 Telecom Bus Interface, associated with Channel 2 is
enabled or not.
If STS-1 Telecom Bus (Channel 2) has been enabled –
STS-1 Transmit Telecom Bus – Input Data Bus pin number 3:
STS1TXA_D3_2:
This input pin along with “STS1TXA_D_2[7:4]” and
“STS1TXA_D_2[2:0] function as the “STS-1 Transmit (Add)
Telecom Bus – Input Data Bus for Channel 2. The STS-1
Telecom Bus interface will sample and latch this pin upon the
falling edge of “STS1TXA_CK_2”.
TXHDLCDAT_3_2 (Transmit HDLC block data – Channel 2
– Input data pin 3)
SSI_NEG (Slow Speed Interface Data Negative for Ingress
Path)
67