XRT94L33_06 Datasheet, PDF (348/465 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET

XRT94L33
Rev.1.2.0.
xr
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
SSTTSS-3-3/1/122
PPEECCLL
IInnteterrfafaccee
BBlolocckk
SSTTSS-3-3/1/122
TTeeleleccoomm
BBuuss
IInnteterrfafaccee
BBlolocckk
SSTTSS-3-3/1/122
CCDDRR
BBlolocckk
LOF
TTrraannssmmitit
SSTTSS-3-3/1/122
TTOOHH
PPrroocceessssoorr
BBlolocckk
TTrraannssmmitit
SSTTSS-3-3/1/122
PPOOHH
PPrroocceessssoorr
BBlolocckk
AIS-P
RReecceeivivee
SSTTSS-3-3/1/122
TTOOHH
PPrroocceessssoorr
BBlolocckk
RReecceeivivee
SSTTSS-3-3/1/122
PPOOHH
PPrroocceessssoorr
BBlolocckk
XRT95L34 – Channel 0 _{MMicicrroopprroocceessssoorr}
IInnteterrfafaccee
BBlolocckk
CClolocckk
SSyynnththeessizizeerr
BBlolocckk
TTrraannssmmitit
AATTMM
CCeellllPPrroocceessssoorr
BBlolocckk
TTrraannssmmitit
PPPPPP
PPrroocceessssoorr
BBlolocckk
RReecceeivivee
AATTMM
CCeellllPPrroocceessssoorr
BBlolocckk
RReecceeivivee
PPPPPP
PPrroocceessssoorr
BBlolocckk
TTrraannssmmitit
UUTTOOPPIIAA
IInnteterrfafaccee
BBlolocckk
TTrraannssmmitit
PPOOSS-P-PHHYY
IInnteterrfafaccee
BBlolocckk
RReecceeivivee
UUTTOOPPIIAA/ _/
IInnteterrfafaccee
BBlolocckk
RReecceeivivee
PPOOSS-P-PHHYY
IInnteterrfafaccee
BBlolocckk
The user can implement this configuration by setting Bits 2 (Transmit AIS-P [down-stream] upon LOF) and 0
(AUTO AIS), within the “Receive STS-3 Transport – Auto AIS Control” Register, to “1” as depicted below.
Receive STS-3 Transport – Auto AIS Control Register (Address = 0x1163)
BIT 7
Transmit
AIS-P
(down-
stream)
upon
Section
Trace
Message
Unstable
R/W
0
BIT 6
Transmit
AIS-P
(down-
stream)
upon
Section
Trace
Message
Mismatch
R/W
0
BIT 5
Transmit
AIS-P
(down-
stream)
upon SF
R/W
0
BIT 4
Transmit
AIS-P
(down-
stream)
upon SD
BIT 3
Transmit
AIS-P
(down-
stream)
upon Loss
of Optical
Carrier
BIT 2
Transmit
AIS-P
(down-
stream)
upon LOF
BIT 1
Transmit
AIS-P
(down-
stream)
upon LOS
BIT 0
AUTO AIS
R/W
R/W
R/W
R/W
R/W
0
0
1
0
1
Of course, if the Receive STS-3 TOH Processor block transmits the AIS-P indicator towards the Receive
STS-3c POH Processor block, then all of the following will happen.
• The Receive STS-3c POH Processor block will declare the AIS-P defect condition.
• The corresponding Receive ATM Cell Processor block will declare the LCD (Loss of Cell Delineation)
defect condition.
2.3.1.4 THE AIS-L (LINE AIS) DEFECT DECLARATION AND CLEARANCE CRITERIA
348