XRT94L33_06 Datasheet, PDF (399/465 Pages) Exar Corporation – 3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET

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3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
XRT94L33
Rev.1.2.0.
2.3.3.4 HANDLING/PROCESSING THE C2 BYTE
2.3.3.4.1 UNEQ-P DECLARATION AND CLEARANCE CRITERIA
2.3.3.4.2 PLM-P DECLARATION AND CLEARANCE CRITERIA
2.3.3.5 RECEIVING/PROCESSING INCOMING PATH TRACE MESSAGES VIA THE J1 BYTE
2.3.3.5.1 TIM-P DECLARATION AND CLEARANCE CRITERIA
2.3.3.5.2 PATH TRACE UNSTABLE DEFECT DECLARATION AND CLEARANCE CRITERIA
2.3.3.6
RECEIVING/PROCESSING THE F2 BYTE WITHIN THE INCOMING STS-1 SPE DATA
STREAM
2.3.3.7
RECEIVING/PROCESSING THE H4 BYTE WITHIN THE INCOMING STS-1 SPE DATA
STREAM
2.3.3.8
RECEVING/PROCESSING THE Z3 BYTE WITHIN THE INCOMING STS-1 SPE DATA-
STREAM
2.3.3.9
RECEIVING/PROCESSING THE Z4 BYTE WITHIN THE INCOMING STS-1 SPE DATA-
STREAM
2.3.3.10 RECEIVING/PROCESSING THE Z5 BYTE WITHIN THE INCOMING STS-1 SPE DATA-
STREAM
2.3.3.11 INTERRUPT PROCESSING WITHIN THE RECEIVE SONET POH PROCESSOR BLOCK
2.3.3.11.1 CHANGE OF LOP-P DEFECT CONDITION INTERRUPT
2.3.3.11.2 CHANGE OF AIS-P DEFECT CONDITION INTERRUPT
2.3.3.11.3 DETECTION OF B3 BYTE ERROR INTERRUPT
2.3.3.11.4 CHANGE OF UNEQ-P DEFECT CONDITION INTERRUPT
2.3.3.11.5 CHANGE OF PLM-P DEFECT CONDITION INTERRUPT
2.3.3.11.6 DETECTION OF REI-P INTERRUPT
2.3.3.11.7 CHANGE OF TIM-P DEFECT CONDITION INTERRUPT
2.3.3.11.8 CHANGE OF PATH TRACE MESSAGE UNSTABLE CONDITION INTERRUPT
2.3.3.12 PERFORMANCE MONITORING WITH THE RECEIVE SONET POH PROCESSOR BLOCK
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