XRS10L240 Datasheet, PDF (6/38 Pages) Exar Corporation – SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR

EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
TABLE 1: XRS10L240 PIN DESCRIPTIONS
REV. 1.05
Pin Name
Pin Number
I/O
DESCRIPTION
PWRDNB
52
I
LVCMOS Active low power down signal for chip, +3.3V LVCMOS.
DRACT[3:0]
71, 72, 73, 74
O
LVCMOS Drive activity port for external LED. Active Low, 3.3V LVC-
MOS, open drain
HBACT
76
O
LVCMOS 0 = Host 0 selected (status)
1 = No Host is selected (status)
0-1-0-1 Toggle (with 1 sec stay at each state) indicates
Host 1 is selected.
3.3V LVCMOS
PS_SIDEBAND_
77
B
I
LVCMOS +3.3V LVCMOS
Please refer to Table 2, “Host Port Selection,” on
page 7
PORTSEL
2
I
LVCMOS Port selector external input pin when this mode is set in
the register. Low selects host port 0, otherwise port 1.
+3.3V LVCMOS
TEST PIN
ANTEST
51
O
Analog Analog test pin
CLKSTN/
CLKSTP
24, 25
O
CML Output clock test pin
AC
Coupled
RESERVED PINS
NC
27, 28, 30, 31,
36, 37, 39, 40
No Connect
SCANMODE
41
I
LVCMOS For factory use only. connect to ground.
POWER AND GROUND SIGNALS
VDD
9, 18, 23, 29,
I
38, 54, 58, 67,
79, 83, 92, 98
1.2V supply.
VDDA
14, 34, 45, 50,
I
62, 87
1.2V Analog supply.
VSS
4, 6, 12, 15, 21,
I
22, 26, 32, 35,
53, 55, 61, 64,
70, 78, 80, 86,
89, 95
Ground.
VSSA
13, 33, 42, 48,
I
63, 88
Analog Ground.
6