XRS10L240 Datasheet, PDF (28/38 Pages) Exar Corporation – SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR

EXSTOR - 1 XRS10L240
SERIAL ATA II: PORT MULTIPLIER / PORT SELECTOR
REV. 1.05
ADDRESS
HEX
N.0040
BIT(S)
7:6
5:0
N.0041
7:6
5:0
N.0044
7:6
5:0
N.0045
7:5
NOTE 1
4
3
2
1
0
TABLE 12: PLL CONFIGURATION (MDIO DEVICE 1, 2, 3)
NAME
TYPE
DEFAULT
DESCRIPTION
Reserved
FBDIV[5:0]
Reserved
REFDIV[5:0]
Reserved
SSCMax
Reserved
SSCmode
Reserved
SSCInvert
Reserved
SSCBypass
RO
-
Reserved
RW
101101 Divide value for feedback clock
110000 = divide by 5
100000 = divide by 10
100001 = divide by 15
100010 = divide by 20
100011 = divide by 25
100101 = divide by 30
100111 = divide by 50
101101 = divide by 60 (default for 25MHz Ref))
Other - reserved
RO
-
Reserved
RW
010000 Divide values for system clock
010000 = divide by 1 (default for 25MHz Ref))
000000 = divide by 2
000001 = divide by 3
000010 = divide by 4
000011 = divide by 5
000101 = divide by 6
000110 = divide by 8
000111 = divide by 10
001101 = divide by 12
001110 = divide by 16
001111 = divide by 20
Others - reserved
RO
-
Reserved
RW
00000 Maximum value for spread (set to 45, [0x2D] when
SSCBypass is set to "0")
RO
-
Reserved
RW
0
Selects position of spreading interpolator
0 = Interpolator in feedback path
1 = Interpolator in feedforward path
Set to ’1’ when SSCBypass = ’0’
RW
0
DO NOT MODIFY
RW
0
Spread up instead of down
RW
0
DO NOT MODIFY
RW
1
Bypass the saw generator and pulse density modu-
lator and get increment from SSCMax (set SSCMax
to 45, 0x2D when SSCBypass is set to 0)
NOTE: 1) In order to enable SSC generation, set register N.0044 to 0x2D, N.0045 to 0x14 and then reset the PLL by
writing register 0.0004 to 0x0 then 0xF.
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