XR17C154_05 Datasheet, PDF (55/62 Pages) Exar Corporation – 5V PCI BUS QUAD UART

xr
REV. 1.3.2
XR17C154
5V PCI BUS QUAD UART
FIGURE 19. DEVICE CONFIGURATION REGISTERS, UART REGISTERS AND TRANSMIT DATA BURST WRITE OPERA-
TION
CLK
Host
1
2
3
4
5
6
7
8
9
FRAME#
Host
AD[31:0]
Host
Target
Address
Data
Data
Data
Data
DWORD DWORD DWORD DWORD
Data DWORD
C/BE[3:0]#
Host
Bus
CMD
Byte Enable# = DWORD
IRDY#
Host
10
11
TRDY#
Target
DEVSEL#
Target
PAR
Host
Target
Address
Parity
Data
Parity
Data
Parity
Data
Parity
Data
Parity
PERR#
Target
Active Active Active Active
SERR#
Target
Active
Note: PERR# and SERR are optional in a bus target application.
Even Parity is on AD[31:0], C/BE[3:0]#, and PAR
Data
Parity
Active
PCI BWR
55