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XR17C154_05 Datasheet, PDF (19/62 Pages) Exar Corporation – 5V PCI BUS QUAD UART
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REV. 1.3.2
XR17C154
5V PCI BUS QUAD UART
FIGURE 6. MULTIPURPOSE INPUT/OUTPUT INTERNAL CIRCUIT
MPIOINT [7:0]
INT
AND
Rising Edge
Detection
AND
MPIOLVL [7:0]
Read Input Level
MPIOINV [7:0]
(Input Inversion Enable =1)
MPIOLVL [7:0]
(Output Level)
MPIO3T [7:0]
(3-state Enable =1)
MPIOSEL [7:0]
(Select Input=1, Output=0 )
1
0
OR
MPIO
Pin [7:0]
MPIOCKT
MPIOINT [7:0] (default 0x00)
Enable multipurpose input pin interrupt. If the MPIO pin is selected by MPIOSEL as input then bit-0 enables
input pin 0 for interrupt, and bit-7 enables input pin 7. No interrupt is enable if the pin is selected to be an
output. The interrupt is edge sensing and determined by MPIOINV and MPIOLVL registers. The MPIO interrupt
clears after a read to register MPIOLVL. The combination of MPIOLVL and MPIOINV determines the interrupt
being active low or active high, it’s level trigger. Logic 0 (default) disables the pin’s interrupt and logic 1 enables
it.
MPIOINT Register
Multipurpose Input/Output Interrupt Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
MPIO7 MPIO6 MPIO5 MPIO4 MPIO3 MPIO2 MPIO1 MPIO0
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