XR17C154_05 Datasheet, PDF (39/62 Pages) Exar Corporation – 5V PCI BUS QUAD UART

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REV. 1.3.2
XR17C154
5V PCI BUS QUAD UART
FCR[7:6]: Receive FIFO Trigger Select
(logic 0 = default, RX trigger level =1)
The FCTR Bits 6-7 are associated with these 2 bits. These 2 bits are used to set the trigger level for the receiv-
er FIFO interrupt. Table 14 shows the complete selections. Note that the receiver and the transmitter cannot
use different trigger tables. Whichever selection is made last applies to both the RX and TX side.
TRIGGER
TABLE
Table A
Table B
Table C
Table D
TABLE 14: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION
FCTR FCTR FCR FCR FCR
BIT-7 BIT-6 BIT-7 BIT-6 BIT-5
FCR
RECEIVE
BIT-4 TRIGGER LEVEL
TRANSMIT
TRIGGER
LEVEL
COMPATIBILITY
0
0
0
0
1 (default) 16C550, 16C2550,
0
0
0
1
1
0
1 (default)
4
8
16C2552, 16C554,
16C580 compati-
ble.
1
1
14
0
1
0
0
0
1
1
0
1
1
0
0
8
0
1
16
1
0
24
1
1
28
16
16C650A compati-
8
ble.
24
30
1
0
0
0
0
1
1
0
1
1
0
0
8
0
1
16
1
0
56
1
1
60
8
16C654 compati-
16
ble.
32
56
1
1
X
X
X
X Programmable Programmable 16C850, 16C2850,
16C2852, 16C854,
16C864, 16L2750,
16L2751, 16L2752
compatible.
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