XRT75VL00_08 Datasheet, PDF (47/50 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

REV. 1.0.6
XRT75VL00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
NOTES:
1. In the Analog loopback mode, data is also output via TTIP and TRING pins.
2. Signals on the RTIP and RRING pins are ignored during analog loopback.
FIGURE 26. ANALOG LOOPBACK
TCLK
TPDATA
TNDATA
HDB3/B3ZS¹
ENCODER
TIMING
CONTROL
Tx
TTIP
TRING
RCLK
RPOS
RNEG
HDB3/B3ZS¹
DECODER
DATA &
CLOCK
Rx
RECOVERY
1 _{if enabled}
2 _{if enabled and selected in either Receive or Transmit path}
RTIP
RRING
8.2.2 DIGITAL LOOPBACK:
The Digital Loopback function is available either in Hardware mode or Host mode. When the Digital Loopback
is selected, the transmit clock (TxClk) and transmit data inputs (TPDATA & TNDATA) are looped back and
output onto the RxClk, RPOS and RNEG pins as shown in Figure 27. The data presented on TxClk, TPDATA
and TNDATA are not output on the TTIP and TRING pins.This provides the capability to configure the
protection card (in redundancy applications) in Digital Loopback mode without affecting the traffic on the
primary card.
NOTE: Signals on the RTIP and RRING pins are ignored during digital loopback.
FIGURE 27. DIGITAL LOOPBACK
TCLK
TPDATA
TNDATA
HDB3/B3ZS¹
ENCODER
TIMING
Tx
CONTROL
TTIP
TRING
RCLK
RPOS
RNEG
HDB3/B3ZS¹
DECODER
DATA &
CLOCK
Rx
RECOVERY
1 _{if enabled}
2 _{if enabled and selected in either Receive or Transmit path}
RTIP
RRING
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