XRT75VL00_08 Datasheet, PDF (33/50 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR

REV. 1.0.6
XRT75VL00
E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
RLOS is the logical OR of the DLOS and ALOS states. When the RLOS condition occurs the RLOS output pin
is toggled “High” and the RLOS bit is set to “1” in the status control register.
TABLE 10: THE ALOS (ANALOG LOS) DECLARATION AND CLEARANCE THRESHOLDS FOR A GIVEN SETTING OF
REQEN (DS3 AND STS-1 APPLICATIONS)
APPLICATION
DS3
STS-1
REQEN SETTING
1
1
SIGNAL LEVEL TO DECLARE ALOS SIGNAL LEVEL TO CLEAR ALOS
<20mV
>90mV
<25mV
>115mV
DISABLING ALOS/DLOS DETECTOR:
For debugging purposes it is useful to disable the ALOS/DLOS detector. Writing a “1” to the ALOS and DLOS
bits disables the LOS detector on a per channel basis.
5.4.2 E3 LOS Condition:
If the level of incoming line signal drops below the threshold as described in the ITU-T G.775 standard, the
LOS condition is detected. Loss of signal level is defined to be between 15 and 35 dB below the normal level. If
the signal drops below 35 dB for 175 ± 75 consecutive pulse periods, LOS condition is declared. This is
illustrated in Figure 19.
FIGURE 19. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775
0 dB
-12 dB
-15dB
LOS Signal Must be Cleared
Maximum Cable Loss for E3
-35dB
LOS Signal may be Cleared or Declared
LOS Signal Must be Declared
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