XR16L580 Datasheet, PDF (47/47 Pages) Exar Corporation – SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

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SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
XR16L580
REV. 1.0.0
4.5 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY ............................................................................... 24
4.5.1 INTERRUPT GENERATION: ...................................................................................................................................... 24
4.5.2 INTERRUPT CLEARING: ........................................................................................................................................... 24
4.6 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ..................................................................................... 25
TABLE 7: INTERRUPT SOURCE AND PRIORITY LEVEL ....................................................................................................................... 25
4.7 LINE CONTROL REGISTER (LCR) - READ/WRITE ..................................................................................... 26
TABLE 8: TRANSMIT AND RECEIVE FIFO TRIGGER LEVEL SELECTION .............................................................................................. 26
4.8 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE 28
TABLE 9: PARITY SELECTION .......................................................................................................................................................... 28
4.9 LINE STATUS REGISTER (LSR) - READ ONLY ........................................................................................... 29
4.10 MODEM STATUS REGISTER (MSR) - READ ONLY .................................................................................. 30
4.11 SCRATCHPAD REGISTER (SPR) - READ/WRITE ..................................................................................... 31
4.12 BAUD RATE GENERATOR REGISTERS (DLL AND DLM) - READ/WRITE .............................................. 31
4.13 DEVICE IDENTIFICATION REGISTER (DVID) - READ ONLY .................................................................... 31
4.14 DEVICE REVISION REGISTER (DREV) - READ ONLY .............................................................................. 31
4.15 ENHANCED FEATURE REGISTER (EFR) ................................................................................................. 31
TABLE 10: SOFTWARE FLOW CONTROL FUNCTIONS ........................................................................................................................ 32
4.16 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - WRITE ONLY ................ 33
TABLE 11: UART RESET CONDITIONS FOR CHANNEL A AND B............................................................................................ 34
ABSOLUTE MAXIMUM RATINGS .................................................................................. 34
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 34
DC ELECTRICAL CHARACTERISTICS.............................................................................................................. 35
AC ELECTRICAL CHARACTERISTICS.............................................................................................................. 36
Unless otherwise noted: TA=0o to 70oC (-40o to +85oC for industrial grade package), Vcc=2.25 - 5.5V, 50 pF load
where applicable ....................................................................................................................................................... 36
FIGURE 14. CLOCK TIMING............................................................................................................................................................. 37
FIGURE 15. MODEM INPUT/OUTPUT TIMING .................................................................................................................................... 38
FIGURE 16. 16 MODE (INTEL) DATA BUS READ TIMING ................................................................................................................... 38
FIGURE 17. 16 MODE (INTEL) DATA BUS WRITE TIMING ................................................................................................................. 39
FIGURE 18. 68 MODE (MOTOROLA) DATA BUS READ TIMING .......................................................................................................... 39
FIGURE 19. 68 MODE (MOTOROLA) DATA BUS WRITE TIMING......................................................................................................... 40
FIGURE 20. RECEIVE READY INTERRUPT TIMING [NON-FIFO MODE] ............................................................................................... 40
FIGURE 21. TRANSMIT READY INTERRUPT TIMING [NON-FIFO MODE] ............................................................................................. 41
FIGURE 22. RECEIVE READY INTERRUPT TIMING [FIFO MODE] ....................................................................................................... 41
FIGURE 23. TRANSMIT READY INTERRUPT TIMING [FIFO MODE] ..................................................................................................... 42
................................................................................................................................................................... 43
PACKAGE DIMENSIONS (48 PIN TQFP - 7 X 7 X 1 MM) .............................................. 43
PACKAGE DIMENSIONS (32 PIN QFN - 5 X 5 X 0.9 MM) ............................................. 44
REVISION HISTORY ...................................................................................................................................... 45
TABLE OF CONTENTS ............................................................................................................ I
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