XR16L580 Datasheet, PDF (46/47 Pages) Exar Corporation – SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

XR16L580
REV. 1.0.0
áç
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
TABLE OF CONTENTS
GENERAL DESCRIPTION .................................................................................................1
APPLICATIONS................................................................................................................................................1
FEATURES .....................................................................................................................................................1
FIGURE 1. BLOCK DIAGRAM ............................................................................................................................................................. 1
FIGURE 2. PACKAGES AND PIN OUT ................................................................................................................................................. 2
ORDERING INFORMATION.................................................................................................................................2
PIN DESCRIPTIONS .........................................................................................................3
1.0 PRODUCT DESCRIPTION .....................................................................................................................5
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................6
2.1 CPU INTERFACE .............................................................................................................................................. 6
FIGURE 3. XR16L580 TYPICAL INTEL/MOTOROLA DATA BUS INTERCONNECTIONS ............................................................................. 6
2.2 5-VOLT TOLERANT INPUTS ........................................................................................................................... 7
2.3 DEVICE HARDWARE RESET .......................................................................................................................... 7
2.4 DEVICE IDENTIFICATION AND REVISION ..................................................................................................... 7
2.5 INTERNAL REGISTERS ................................................................................................................................... 7
2.6 DMA MODE ....................................................................................................................................................... 7
2.7 INT (IRQ#) OUTPUT ......................................................................................................................................... 7
TABLE 1: INT (IRQ#) PIN OPERATION FOR TRANSMITTER ................................................................................................................. 7
2.8 CRYSTAL OR EXTERNAL CLOCK INPUT ..................................................................................................... 8
FIGURE 4. TYPICAL CRYSTAL CONNECTIONS ..................................................................................................................................... 8
TABLE 2: INT (IRQ#) PIN OPERATION FOR RECEIVER ...................................................................................................................... 8
2.9 PROGRAMMABLE BAUD RATE GENERATOR ............................................................................................ 9
FIGURE 5. EXTERNAL CLOCK CONNECTION FOR EXTENDED DATA RATE ............................................................................................ 9
FIGURE 6. BAUD RATE GENERATOR AND PRESCALER ....................................................................................................................... 9
TABLE 3: TYPICAL DATA RATES WITH A 14.7456 MHZ CRYSTAL OR EXTERNAL CLOCK ...................................................................... 10
2.10 TRANSMITTER ............................................................................................................................................. 11
2.10.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY ....................................................................................... 11
2.10.2 TRANSMITTER OPERATION IN NON-FIFO MODE ................................................................................................ 11
2.10.3 TRANSMITTER OPERATION IN FIFO MODE ......................................................................................................... 11
FIGURE 7. TRANSMITTER OPERATION IN NON-FIFO MODE .............................................................................................................. 11
2.11 RECEIVER .................................................................................................................................................... 12
2.11.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .......................................................................................... 12
FIGURE 8. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE ..................................................................................... 12
FIGURE 9. RECEIVER OPERATION IN NON-FIFO MODE .................................................................................................................... 13
FIGURE 10. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE ....................................................................... 13
2.12 AUTO RTS (HARDWARE) FLOW CONTROL ............................................................................................ 14
2.13 AUTO RTS HYSTERESIS ............................................................................................................................ 14
2.14 AUTO CTS FLOW CONTROL ..................................................................................................................... 14
FIGURE 11. AUTO RTS AND CTS FLOW CONTROL OPERATION....................................................................................................... 15
2.15 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL .................................................................................. 16
2.16 SPECIAL CHARACTER DETECT ............................................................................................................... 16
TABLE 4: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ............................................................................................................... 16
2.17 INFRARED MODE ........................................................................................................................................ 17
FIGURE 12. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING .......................................................................... 17
2.18 SLEEP MODE WITH WAKE-UP INTERRUPT AND POWER-SAVE FEATURE ........................................ 18
2.18.1 SLEEP MODE ........................................................................................................................................................... 18
2.18.2 POWER-SAVE FEATURE ........................................................................................................................................ 18
2.19 INTERNAL LOOPBACK .............................................................................................................................. 19
FIGURE 13. INTERNAL LOOP BACK ................................................................................................................................................. 19
3.0 UART INTERNAL REGISTERS ...........................................................................................................20
TABLE 5: UART INTERNAL REGISTERS .................................................................................................................................... 20
TABLE 6: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1.......................................... 21
4.0 INTERNAL REGISTER DESCRIPTIONS .............................................................................................22
4.1 RECEIVE HOLDING REGISTER (RHR) - READ- ONLY ............................................................................... 22
4.2 TRANSMIT HOLDING REGISTER (THR) - WRITE-ONLY ............................................................................ 22
4.3 BAUD RATE GENERATOR DIVISORS (DLL AND DLM) - READ/WRITE ................................................... 22
4.4 INTERRUPT ENABLE REGISTER (IER) - READ/WRITE .............................................................................. 22
4.4.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................. 22
4.4.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION ................................................................ 22
I