XR16L580 Datasheet, PDF (19/47 Pages) Exar Corporation – SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE

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REV. 1.2.0
XR16L580
SMALLEST 2.25V TO 5.5V UART WITH 16-BYTE FIFO AND POWERSAVE
2.19 Internal Loopback
The L580 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally
including automatic hardware and software flow control. Figure 13 shows how the modem port signals are re-
configured. Transmit data from the transmit shift register output is internally routed to the receive shift register
input allowing the system to receive the same data that it was sending. The TX pin is held at logic 1 or mark
condition while RTS# and DTR# are de-asserted, and CTS#, DSR# CD# and RI# inputs are ignored. Caution:
the RX input pins must be held to a logic 1 during loopback test else upon exiting the loopback test the UART
may detect and report a false “break” signal.
FIGURE 13. INTERNAL LOOP BACK
Transmit Shift Register
(THR/FIFO)
VCC
MCR bit-4=1
Receive Shift Register
(RHR/FIFO)
VCC
RTS#
CTS#
VCC
DTR#
DSR#
RI#
OP1#
CD#
OP2#
TX
RX
RTS#
CTS#
DTR#
DSR#
RI#
CD#
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