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XRT73LC00 Datasheet, PDF (46/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT | |||
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XRT73LC00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.1
áç
PRELIMINARY
FIGURE 33. TWO LIUâS, EACH MONITORING THE TRANSMIT OUTPUT SIGNAL OF THE OTHER LIU IC
DMO_Channel_2
U1
DMO
TXOFF
U2
DMO_Channel_1
TXOFF
DMO
TTIP
TRING
MTIP
MRING
R3
270 â¦
R4
270 â¦
MRING
MTIP
TRING
R5
270 â¦
R6
270 â¦
TTIP
R1
31.6â¦
R2
31.6â¦
T1
BNC
PE-68629
R7
31.6â¦
R8
31.6â¦
T2
BNC
PE-68629
Presented in Figure 33, if LIU # 1 (U1) fails, then LIU
# 2 (U2) drives its DMO output pin âHighâ. Likewise, if
LIU # 2 (U2) fails, then LIU # 1 (U1) drives its DMO
output pin âHighâ.
The scheme presented in Figure 33 is a better design
approach. It overcomes situations in which a LIU
monitoring its own signal (Figure 32) may experience
a failure mode such that it cannot drive a bipolar sig-
nal onto the line. That same failure mode may pre-
vent the LIU from driving the DMO output pin âHighâ.
4.6 THE TAOS (TRANSMIT ALL ONES) FEATURE
The XRT73LC00 can transmit an all â1âsâ pattern onto
the line by toggling a single input pin or by setting a
single bit-field in one of the Command Registers to
â1â.
NOTE: When this feature is activated, the Transmit Section
of the XRT73LC00 overwrites the Terminal Equipment data
with this all â1âsâ pattern.
This feature can be activated by either of the following
methods.
When the XRT73LC00 is operating in the Hard-
ware Mode:
Configure the device to transmit an all â1âsâ pattern by
toggling the TAOS input pin (pin 2) âHighâ. Terminate
the all â1âsâ pattern by toggling the TAOS input pin
âLowâ.
When the XRT73LC00 is operating in the HOST
Mode:
If the XRT73LC00 is operating in the HOST Mode,
the TAOS input pin is disabled. Consequently, the
XRT73LC00 can be configured to transmit an all â1âsâ
pattern by writing to Command Register CR1 and set-
ting the TAOS bit-field (bit D3) to â1â.
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF TAOS TXCLKINV TXLEV TXBIN
0
1
X
X
X
The all â1âsâ pattern can be terminated by writing to
Command Register CR1 and setting the TAOS bit-
field (D3) to â0".
43
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