XRT73LC00 Datasheet, PDF (15/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

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PRELIMINARY
XRT73LC00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.1
AC ELECTRICAL CHARACTERISTICS
(TA = 25^°C, VDD = 3.3V + 5%, UNLESS OTHERWISE SPECIFIED)
SYMBOL
PARAMETER
MIN.
Terminal Side Timing Parameters (See Figure 3 & Figure 4)
TCLK Clock Duty Cycle (DS3/STS-1)
30
TCLK Clock Duty Cycle (E3)
30
TCLK Frequency (SONET STS-1)
TCLK Frequency (DS3)
TCLK Frequency (E3)
t_RTX TCLK Clock Rise Time (10% to 90%)
t_FTX TCLK Clock Fall Time (90% to 10%)
t_TSU TPDATA/TNDATA to TCLK Falling Set up time
3
t_THO TPDATA/TNDATA to TCLK Falling Hold time
3
t_LCVO RCLK to rising edge of LCV output delay
t_TDY TTIP/TRING to TCLK Rising Propagation Delay time
0.6
RCLK Clock Duty Cycle
45
RCLK Frequency (SONET STS-1)
RCLK Frequency (DS3)
RCLK Frequency (E3)
t_CO
t_RRX
t_FRX
C_i
C_L
RCLK to RPOS/RNEG Delay Time
RCLK Clock Rise Time (10% to 90%)
RCLK Clock Fall Time (10% to 90%)
Input Capacitance
Load Capacitance
TYP.
50
50
51.84
44.736
34.368
2.5
50
51.84
44.736
34.368
2
1.5
MAX.
70
70
4
4
14
55
4
4
3
10
10
UNITS
%
%
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
%
MHz
MHz
MHz
ns
ns
ns
pF
pF
12