XRT73LC00 Datasheet, PDF (1/53 Pages) Exar Corporation – E3/DS3/STS-1 LINE INTERFACE UNIT

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PRELIMINARY
XRT73LC00
AUGUST 2002
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.0.1
GENERAL DESCRIPTION
The XRT73LC00 DS3/E3/STS-1 Line Interface Unit is
a low power CMOS version of the XRT73L00A and
consists of a line transmitter and receiver integrated
on a single chip and is designed for DS3, E3 or SO-
NET STS-1 applications.
XRT73LC00 can be configured to support the E3
(34.368 Mbps), DS3 (44.736 Mbps) or the SONET
STS-1 (51.84 Mbps) rates.
In the transmit direction, the XRT73LC00 encodes in-
put data to either B3ZS (for DS3/STS-1 applications)
or HDB3 (for E3 applications) format and converts the
data into the appropriate pulse shapes for transmis-
sion over coaxial cable via a 1:1 transformer.
In the receive direction the XRT73LC00 performs
equalization on incoming signals, performs Clock Re-
covery, decodes data from either B3ZS or HDB3 for-
mat, converts the receive data into TTL/CMOS for-
mat, checks for LOS or LOL conditions and detects
and declares the occurrence of line code violations.
The XRT73LC00 also contains a 4-Wire Microproces-
sor Serial Interface for accessing the on-chip Com-
mand registers.
FEATURES
• Incorporates an improved Timing Recovery circuit
and is pin and functional compatible to XRT73L00A
• Meets E3/DS3/STS-1 Jitter Tolerance Require-
ments
• Full Loop-Back Capability
• Transmit and Receive Power Down Modes
• Full Redundancy Support
• Contains a 4-Wire Microprocessor Serial Interface
• Uses Minimum External components
• Low Power CMOS Design
• Single +3.3V Power Supply
• 5 V Tolerant pins
• -40°C to +85°C Operating Temperature Range
• Available in a 44 pin TQFP package
APPLICATIONS
• Interfaces to E3, DS3 or SONET STS-1 Networks
• CSU/DSU Equipment
• PCM Test Equipment
• Fiber Optic Terminals
• Multiplexers
FIGURE 1. BLOCK DIAGRAM OF THE XRT73LC00
E3
S T S -1 /D S 3
Host/(HW )
RLOL EXCLK
IC T
R C L K IN V
R T IP
R R IN G
REQ DIS
LOSTHR
SDI
SDO /(LCV)
S C lk
CS
REGRESET
TTIP
T R IN G
M TIP
M RING
DMO
AGC/
Equalizer
Peak
Detector
Slicer
C lo c k
Recovery
LOS Detector
Serial
Processor
Interface
Loop MUX
Data
Recovery
Invert
HDB3/
B3ZS
Decoder
D e v ic e
M o n ito r
Pulse
Shaping
Tx
Control
HDB3/
B3ZS
Encoder
Transm it
Logic
Duty Cycle Adjust
RCLK1
L C V /(R C L K 2 )
RPOS
RNEG
D R /S R
RLOS
LLB
RLB
E N D E C D IS
TAOS
TPDATA
TNDATA
T C lk
TXLEV
TXOFF
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • [phone] • FAX [phone] • www.exar.com