XR16M2551 Datasheet, PDF (44/51 Pages) Exar Corporation – HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE

XR16M2551
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE
REV. 1.0.2
FIGURE 20. TRANSMIT READY & INTERRUPT TIMING [NON-FIFO MODE] FOR CHANNELS A & B
TX
Start
Bit
D0:D7
Stop
Bit
IER[1]
enabled
ISR is read
D0:D7
ISR is read
INT*
T_WRI
TXRDY#
T_WRI
T_SRT
T_SRT
T_WRI
D0:D7
ISR is read
T_SRT
T_WT
T_WT
IOW#
(Loading data
into THR)
*INT is cleared when the ISR is read or when data is loaded into the THR.
T_WT
TXNonFIFO
FIGURE 21. RECEIVE READY & INTERRUPT TIMING [FIFO MODE, DMA DISABLED] FOR CHANNELS A & B
Start
Bit
RX
S D0:D7 S D0:D7 T
D0:D7 S D0:D7 T S D0:D7 T S D0:D7 T S D0:D7 T
Stop
Bit
INT
T_SSR
RXRDY#
First Byte is
Received in
RX FIFO
T_SSI
RX FIFO fills up to RX
Trigger Level or RX Data
Timeout
RX FIFO drops
below RX
Trigger Level
FIFO
Empties
T_RRI
T_RR
IOR#
(Reading data out
of RX FIFO)
RXINTDMA#
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