XR21B1424_17 Datasheet, PDF (35/64 Pages) Exar Corporation – Enhanced 4-Ch Full-Speed USB UART

OUTCLK (0x018) - Read/Write
This register is used to set the output clock frequency and duty cycle.
Bit
15:8
7:0
Default
Description
0
DIV_HI
Sets the high period of the clock in intervals of 41.67 ns.
0
DIV_LO
Sets the low period of the clock in intervals of 41.67 ns.
XR21B1424
REMOTE_WAKE (0x01F) - Read/Write
This register is used to configure the remote wakeup feature.
Bit
15:4
3
2
1:0
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
0
RX_EN
0: The XR21B1424 device is not sensitive to RX pin for remote wakeup
1: A high to low transition on the RX pin signals a remote wakeup event to the XR21B1424 device if the RX pin is configured
as an input.
1
RI_EN
0: The XR21B1424 device is not sensitive to the RI#/RWK# pin for remote wakeup.
1: A high to low transition on the RI#/RWK# pin signals a remote wakeup event to the XR21B1424 device if the RI#/RWK# pin
is configured as an input.
0
Reserved
These bits are reserved and should be written as ’0’.
TX_FIFO_FLUSH (0x040) - Write Only
This register is used to flush the transmit FIFO.
Bit
15:3
2
1
0
Default
Description
0
Reserved
These bits are reserved and should be written as ‘0’.
0
AUTO_CLOSE
0: No effect on the TX FIFO when the UART port TX is disabled
1: The TX FIFO is automatically flushed when the UART port TX is disabled
1
AUTO_OPEN
0: No effect on the TX FIFO when the UART port TX is enabled
1: The TX FIFO is automatically flushed when the UART port TX is enabled
0
Reset
0: No effect on the TX FIFO
0: Resets the TX FIFO, self-clearing
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exar.com/XR21B1424
Rev 1C