XRD98L61_01 Datasheet, PDF (14/38 Pages) Exar Corporation – CCD Image Digitizers with CDS, PGA and 12-Bit A/D

XRD98L61
Delay A
Default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DelayA[8] DelayA[7] DelayA[6] DelayA[5] DelayA[4] DelayA[3] DelayA[2] DelayA[1] DelayA[0]
0
0
0
0
0
0
0
0
0
0
Delay A Register (Reg. 11, Address 001011)
Delay B
Default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DelayB[8] DelayB[7] DelayB[6] DelayB[5] DelayB[4] DelayB[3] DelayB[2] DelayB[1] DelayB[0]
0
0
0
0
0
0
0
0
0
0
DelayB Register (Reg. 12, Address 001100)
The DelayA & DelayB registers are used to add internal delay to the pixel rate clocks.
For each 3 bit delay parameter, 000 is minimum delay, 111 is maximum delay (∼7ns).
DelayA[8:6]: ADC Clock delay.
DelayA[5:3]: φ1 trailing edge delay.
DelayA[2:0]: φ1 leading edge delay.
DelayB[8:6]: Delay for SPIX option.
DelayB[5:3]: φ2 trailing edge delay.
DelayB[2:0]: φ2 leading edge delay.
DAC0
Default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DAC0[7] DAC0[6] DAC0[5] DAC0[4] DAC0[3] DAC0[2] DAC0[1] DAC0[0]
0
0
0
0
0
0
0
0
0
0
DAC0 Register (Reg. 13, Address 001101)
DAC1
Default
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
DAC1[7] DAC1[6] DAC1[5] DAC1[4] DAC1[3] DAC1[2] DAC1[1] DAC1[0]
0
0
0
0
0
0
0
0
0
0
DAC1 Register (Reg. 14, Address 001110)
The DAC1 & DAC0 registers are used to program
the two 8-bit Utility DACs.
Code 00000000 is minimum output voltage.
Code 11111111 is maximum output voltage.
Rev. 2.00
14