NUC946ADN Datasheet, PDF (7/376 Pages) List of Unclassifed Manufacturers – 32-BIT ARM926EJ-S BASED MCU

NUC946ADN
32-BIT ARM926EJ-S BASED MCU
 I/O ports are Programmable and Configurable for Multiple functions
Advanced Interrupt Controller
 31 interrupt sources, including 3 external interrupt sources
 Programmable normal or fast interrupt mode (IRQ, FIQ)
 Programmable as either edge-triggered or level-sensitive for 3 external interrupt sources
 Programmable as either low-active or high-active for 3 external interrupt sources
 Priority methodology is encoded to allow for interrupt daisy-chaining
 Automatically mask out the lower priority interrupt during interrupt nesting
 Automatically clear the interrupt flag when the interrupt source is programmed to be edge-triggered
USB Host Controller with tranceiver
 Fully compliant with USB Revision 2.0 specification.
 Enhanced Host Controller Interface (EHCI) Revision 1.0 compatible.
 Open Host Controller Interface (OHCI) Revision 1.0 compatible.
 Supports high-speed (480Mbps), full-speed (12Mbps) and low-speed (1.5Mbps) USB devices.
 Supports Control, Bulk, Interrupt, Isochronous and Split transfers.
 Built-in DMA for real-time data transfer.
 Support two ports (one port transceiver is shared with USB Device Controller)
USB Device Controller with tranceiver
 Compliant with USB version 2.0 specification.
 Software control for device remote-wakeup.
 Supports 6 configurable IN/OUT endpoints in addition to Control Endpoint. Each of these endpoints can
be configures as In or Out with Isochronous, Bulk or Interrupt transfer.
 Three different modes of operation of an in-endpoint (Auto validation mode, manual validation mode,
Fly mode.
 Supports Endpoint Maximum Packet Size up to 1024 bytes.
PLL
 Supports one on-chip PLLs
 The external clock can be multiplied by on-chip PLL to provide high frequency system clock
 The input frequency range is 4-30MHz; 15MHz is preferred.
 Programmable clock frequency
I2C Master
 support master mode only
 Multi Master Operation
 Clock stretching and wait state generation
 Provide multi-byte transmit operation, up to 4 bytes can be transmitted in a single transfer
 Software programmable acknowledge bit
 Arbitration lost interrupt, with automatic transfer cancellation
 Start/Stop/Repeated Start/Acknowledge generation
 Start/Stop/Repeated Start detection
 Bus busy detection
 Supports 7 bit addressing mode
 Software mode I²C
Publication Release Date: July 26, 2011
7
Revision: A5