NUC946ADN Datasheet, PDF (259/376 Pages) List of Unclassifed Manufacturers – 32-BIT ARM926EJ-S BASED MCU

NUC946ADN
7.10.2 Register Details
32-BIT ARM926EJ-S BASED MCU
Global Control and Status Register (FMICSR)
Register
FMICSR
Address
R/W
0xB000_D000 R/W
Description
Global Control and Status Register
Reset Value
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
Reserved
MS_EN
SD_EN SW_RST
Bits
[2]
Descriptions
MS_EN
Memory Stick Functionality Enable
0 = Disable MS functionality of FMI.
1 = Enable MS functionality of FMI.
Secure Digital Functionality Enable
[1]
SD_EN
0 = Disable SD functionality of FMI.
1 = Enable SD functionality of FMI.
Software Engine Reset
[0]
SW_RST
0 = Writing 0 to this bit has no effect.
1 = Writing 1 to this bit will reset all FMI engines. The contents of control
register will not be cleared. This bit will auto clear after few clock cycles.
NOTE: Software can enable only one engine at one time, or FMI will work abnormal.
Publication Release Date: July. 26, 2011
259
Revision: A5