NUC946ADN Datasheet, PDF (31/376 Pages) List of Unclassifed Manufacturers – 32-BIT ARM926EJ-S BASED MCU

NUC946ADN
32-BIT ARM926EJ-S BASED MCU
Power-On Setting Register （PWRON）
This register latches the chip power-on setting from EBI Address Bus during chip reset.
Register
PWRON
Address
0xB000_0004
R/W
R/W
Description
Power-On Setting Register
Reset Value
Undefined
31
30
29
28
27
26
RESERVED
23
22
21
20
19
18
RESERVED
15
14
13
12
11
10
RESERVED
USBDEN
7
6
Booting Device Select
5
4
RESERVED
3
2
GPIOSEL
25
24
17
16
9
USBHD
1
8
RESERVE
D
0
Reserved PLL
Bits
[0]
[3:2]
[7:6]
Descriptions
PLL
Internal System Clock Select (Read/Write)
Power-On value latched from MA17
0= the external clock from EXTAL15M pin is served as internal system clock.
1= the PLL output clock is used as internal system clock.
GPIO Pin Configuration Select(Read Only)
GPIOSEL
Booting
Device
Select
Latched pin H/L
0
[1]
MA14
1
0
[2]
MA15
1
GPIO Pin Function
GPIOC/D/E
UART
GPIOF
RMII
Booting Device Select (Read Only)
these two bits are power-on reset from MA[21:20]
Booting Device Select
[7:6]
Booting Device
0
0
SPI Flash ROM
0
1
Reserved
1
0
USB ISP
1
1
NOR-type Flash ROM
Publication Release Date: July 26, 2011
31
Revision: A5