82C862 Datasheet, PDF (35/51 Pages) List of Unclassifed Manufacturers – FireLink USB Dual Controller Quad Port USB

FireLink USB
82C862
7
6
5
4
3
2
1
0
MEMOFST 10h
Reserved
Allow interrupt
generation due
to Root Hub
Status
Change:
0 = Ignore
1 = Enable
HcInterruptEnable Register - Byte 0*
Allow interrupt
generation due
to Frame
Number
Overflow:
Reserved
All writes to this
bit are ignored.
0 = Ignore
1 = Enable
Allow interrupt
generation due
to Resume
Detected:
0 = Ignore
1 = Enable
Allow interrupt
generation due
to Start of
Frame:
0 = Ignore
1 = Enable
Default = 00h
Allow interrupt
generation due
to Writeback
Done Head:
Allow interrupt
generation due
to Scheduling
Overrun:
0 = Ignore
1 = Enable
0 = Ignore
1 = Enable
MEMOFST 11h-12h
HcInterruptEnable Register - Bytes 1 & 2
Reserved
Default = 00h
MEMOFST 13h
HcInterruptEnable Register - Byte 3*
Master
interrupt
generation:
0 = Ignore
1 = Allows all
interrupts to
be enabled
in 10h-13h.
Allow interrupt
generation due
to Ownership
Change:
0 = Ignore
1 = Enable
Reserved
* Writing a 1 to a bit in this register sets the corresponding bit, while writing a 0 leaves the bit unchanged.
Default = 00h
MEMOFST 14h
HcInterruptDisable Register - Byte 0*
Default = 00h
Reserved
Allow interrupt
generation due
to Root Hub
Status
Change:
0 = Ignore
1 = Disable
Allow interrupt
generation due
to Frame
Number
Overflow:
Reserved
All writes to this
bit are ignored.
0 = Ignore
1 = Disable
Allow interrupt
generation due
to Resume
Detected:
0 = Ignore
1 = Disable
Allow interrupt
generation due
to Start of
Frame:
0 = Ignore
1 = Disable
Allow interrupt
generation due
to Writeback
Done Head:
0 = Ignore
1 = Disable
Allow interrupt
generation due
to Scheduling
Overrun:
0 = Ignore
1 = Disable
MEMOFST 15h-16h
HcInterruptDisable Register - Bytes 1 & 2
Reserved
Default = 00h
MEMOFST 17h
HcInterruptDisable Register - Byte 3*
Master
interrupt
generation:
0 = Ignore
1 = Allows all
interrupts to
be disabled
in 10h-13h.
Allow interrupt
generation due
to Ownership
Change:
0 = Ignore
1 = Disable
Reserved
* Writing a 1 to a bit in this register clears the corresponding bit, while writing a 0 leaves the bit unchanged.
Default = 00h
MEMOFST 18h-1Bh
HcHCCA Register
Bits [31:0] correspond to: 18h = [7:0], 19h = [15:8], 1Ah = [23:16], 1Bh = [31:24].
- Bits [7:0] Reserved
- Bits [31:8] Pointer to HCCA base address
Default = 00h
MEMOFST 1Ch-1Fh
HcPeriodCurrentED Register
Bits [31:0] correspond to: 1Ch = [7:0], 1Dh = [15:8], 1Eh = [23:16], 1Fh = [31:24].
- Bits [3:0] Reserved
- Bits [31:4] Pointer to current Periodic List End Descriptor
Default = 00h
912-2000-030
Revision 1.0
®
Page 31