82C862 Datasheet, PDF (18/51 Pages) List of Unclassifed Manufacturers – FireLink USB Dual Controller Quad Port USB

FireLink USB
82C862
4.2 PCI Controller
The PCI controller interfaces the host controller to the PCI bus. As a master, the PCI controller is responsible for running
cycles on the PCI bus on behalf of the host controller. As a target, the PCI controller monitors the cycles on the PCI bus and
determines when to respond to these cycles. A USB host controller module is a PCI target when it decodes cycles to its
internal PCI configuration registers or to its internal PCI memory mapped I/O registers. The PCI controller asserts DEVSEL# in
medium decode timing to claim a PCI transaction.
Since two PCI-interfaced USB controller modules reside on-chip, the logic includes an internal arbiter to select between the
two modules when one or both make a bus mastering request.
The PCI configuration space of the primary USB host controller module is accessed as Device #X, Function #0, where Device
#X depends on which AD line is connected to the IDSEL input. For the secondary USB host controller module, PCI
configuration register space is accessed as Function #1 instead. PCI configuration space is hereafter referred to as PCICFG.
Table 3 gives a register map of the PCICFG register space (duplicated for each of the two functions). Refer to Section 5.1,
"PCICFG Register Space" for detailed bit information.
Table 3. PCI Controller Register Map
PCICFG
R/W Register Name
PCICFG
R/W Register Name
00h-01h
02h-03h
04h-05h
06h-07h
08h
09h-0Bh
0Ch
0Dh
0Eh
0Fh
10h-13h
14h-2Bh
2Ch-2Dh
2Eh-2Fh
30h-3Bh
3Ch
3Dh
3Eh
RO
Vendor ID
RO
Device ID
R/W Command
R/W Status
RO
Revision ID
RO
Class Code
R/W Cache Line Size
R/W Master Latency Timer
RO
Header Type
--
Reserved
R/W Base Address Register 0
--
Reserved
RO
Subsystem Vendor
RO
Subsystem ID
--
Reserved
R/W Interrupt Line
R/W Interrupt Pin
R/W Minimum Grant
3Fh
40h-45h
46h-4Bh
4Ch
4Dh
4Eh-4Fh
50h
51h
52h
53h
54h
55h
56h-7Bh
7Ch-7Fh
80h-EFh
F0h-F5h
F6h-FFh
R/W Maximum Latency
--
Reserved for factory test
--
Reserved
R/W Interrupt Pin Selection
R/W Miscellaneous Control
--
Reserved
R/W PCI Host Feature Control
--
Reserved
R/W Strap Option Override
R/W GPIO Select
R/W GPIO Output Enable
R/W GPIO Data
--
Reserved
R/W Subsystem ID Restore
--
Reserved
R/W PCI Power Management
--
Reserved
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912-2000-030
Revision: 1.0