82C862 Datasheet, PDF (30/51 Pages) List of Unclassifed Manufacturers – FireLink USB Dual Controller Quad Port USB

FireLink USB
82C862
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PCICFG 34h
Capabilities Pointer Register (RO)
Default = F0h
This register provides the offset into the PCI Configuration Space of the USB controller for the location of the PCI Power Management
register block. This location is PCICFG F0h
PCICFG 35h-3Bh
Reserved
Default = 00h
PCICFG 3Ch
Interrupt Line Register
Default = 00h
This register identifies the system interrupt controller line to which the interrupt pin of this USB controller module is connected. The value of
this register is used by device drivers and has no direct meaning to the USB core.
PCICFG 3Dh
Interrupt Pin Register
Primary Default = 01h
Secondary Default = 02h
This register identifies the interrupt pin a device uses. The primary USB controller module uses INTA#, so this value reads 01h by default;
the secondary USB controller module uses INTB#, so this value reads 02h by default. The interrupt pin used by each USB controller module
can be changed via the respective PCICFG 4Ch[1:0].
PCICFG 3Eh
Minimum Grant Register (RO)
Reserved
Default = 00h
PCICFG 3Fh
Maximum Latency Register (RO)
Reserved
Default = 00h
PCICFG 40h-44h
Reserved
These registers are for internal testing purposes. Do not write to these registers.
Default = 00h
PCICFG 45h
Reserved
This register is for internal testing purposes. Do not write to this register.
Reserved
Reserved
Default = 00h
SIE Pipelining
0=Enable
1=Disable
PCICFG 46h-4Bh
Reserved
Default = 00h
PCICFG 4Ch
Interrupt Pin Selection Register
Reserved
Function 0 Default = 00h
Function 1 Default = 01h
USB controller interrupt pin:
00 = PCIRQ0# (INTA#)
01 = PCIRQ1# (INTB#)
10 = PCIRQ2# (INTC#)
11 = PCIRQ3# (INTD#)
The interrupt pin selected will be
reflected in PCICFG 3Dh.
PCICFG 4Dh
Miscellaneous Control Register
Reserved
Default = 00h
State of
Capabilities bit:
0 = Force
PCICFG
06h[4] = 0
1 = Force
PCICFG
06h[4] = 1
Reserved
PCICFG 4E-4Fh
Reserved
Default = 00h
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912-2000-030
Revision: 1.0