82C862 Datasheet, PDF (34/51 Pages) List of Unclassifed Manufacturers – FireLink USB Dual Controller Quad Port USB

FireLink USB
82C862
7
6
5
4
3
2
1
0
MEMOFST 08h
HcCommandStatus Register - Byte 0
Default = 00h
Reserved
Ownership
Change
Request:
When set by
software, this
bit sets the
Ownership
Change bit
(MEMOFST
0Fh[6]).
Bulk List has
an active
endpoint
descriptor?(1)
0 = No
1 = Yes
Control List
has an active
endpoint
descriptor?(1)
0 = No
1 = Yes
HC Reset:
Writing a 1
initiates a
software reset.
This bit is
cleared by the
HC upon
completion of
reset operation.
Cleared by
software.
(1) The bit may be set by either software or the HC. It is cleared by the HC each time it begins processing the head of the list (Bulk List for
bit 2, Control List for bit 1)
MEMOFST 09h
HcCommandStatus Register - Byte 1
Reserved
Default = 00h
MEMOFST 0Ah
HcCommandStatus Register - Byte 2
Reserved
Default = 00h
Schedule Overrun Count:
This field increments every time
the Scheduling Overrun bit
(MEMOFST 0Ch[0] is set. The
count wraps from 11 to 00.
MEMOFST 0Bh
HcCommandStatus Register - Byte 3
Reserved
Default = 00h
MEMOFST 0Ch
HcInterrupt Status Register - Byte 0*
Default = 00h
Reserved
Root Hub Frame Number
Status
Overflow:
Change:
This bit is set
This bit is set when
when the
MEMOFST
content of HcRh 3Ch[15] (Frame
Status (50h- Number
53h) or the
Register)
content of any changes from
HcRhPort
0-to-1 or from
Status Register 1-to-0.
(54h-5Bh) has
changed.
Unrecoverable
Error:
This event is
not
implemented
and is
hardcoded to 0.
All writes are
ignored.
Resume
Detected:
This bit is set
when the HC
detects resume
signaling on a
downstream
port.
Start of Frame: Writeback
This bit is set
Done Head:
when the
This bit is set
Frame
after the Host
Management Controller has
block signals a written
"Start of Frame" HcDoneHead to
event.
HccaDoneHead
.
Scheduling
Overrun
occurred?
0 = No
1 = Yes
MEMOFST 0Dh-0Eh
HcInterruptStatus Register - Bytes 1 & 2
Reserved
Default = 00h
MEMOFST 0Fh
HcInterruptStatus Register - Byte 3*
Reserved
Ownership
Change:
Reserved
This bit is set
when the
Ownership
Change
Request bit
(MEMOFST
08h[3]) is set.
* Writing a 1 to a bit in this register clears the corresponding bit, while writing a 0 leaves the bit unchanged.
Default = 00h
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Page 30
912-2000-030
Revision: 1.0