TCS37717FN Datasheet, PDF (29/48 Pages) List of Unclassifed Manufacturers – The benefits and features of the TCS3771 are listed below

TCS3771 − Principles of Operation
Figure 33:
Wait Time Register
Wait Time Register (0x03)
Wait time is set 2.4ms increments unless the WLONG bit is
asserted in which case the wait times are 12× longer. WTIME is
programmed as a 2’s complement number.
Field
WTIME
Bits
7:0
Register Value
0xFF
0xAB
0x00
Description
Wait Time
1
Time
(WLONG = 0)
2.4ms
85
204ms
256
614ms
Time
(WLONG = 1)
0.029 sec
2.45 sec
7.4 sec
Figure 34:
RGBC Interrupt Threshold Registers
RGBC Interrupt Threshold Registers
(0x04 − 0x07)
The RGBC Interrupt Threshold Registers provides the values to
be used as the high and low trigger points for the comparison
function for interrupt generation. If the value generated by the
clear channel crosses below the lower threshold specified, or
above the higher threshold, an interrupt is asserted on the
interrupt pin.
Register
AILTL
AILTH
AIHTL
AIHTH
Address
0x04
0x05
0x06
0x07
Bits
7:0
7:0
7:0
7:0
Description
RGBC clear channel low threshold lower byte
RGBC clear channel low threshold upper byte
RGBC clear channel high threshold lower byte
RGBC clear channel high threshold upper byte
ams Datasheet, Confidential
[v1-20] 2014-Aug-06
Page 29
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