ICM200E Datasheet, PDF (9/32 Pages) List of Unclassifed Manufacturers – Megapixel (UXGA) Digital Color CMOS Image Sensor

ICM200E
2 Megapixel (UXGA) Digital Color CMOS Image Sensor
Preliminary Data Sheet V1.1
Table 1. Bare Die Pad Assignments (continued)
Pin
Name
Class^*
Function
17
SIF_MS
D, I
Indicates whether the SIF interface is in master mode
(autoload mode) or in slave mode. When the MSSEL pin is
pulled down during power up, the sensor’s SIF interface is
operated as a SIF slave device waiting to be controlled by
an external SIF master, such as a microprocessor. When the
MSSEL pin is pulled up during power up, the sensor’s SIF
interface is first acting as a SIF master device trying to read
from an external SIF EEPROM. After that, the SIF
interface returns to slave mode.
Selection: 0 = slave and 1= master.
18
PCLK
D, O
Pixel clock output
19
N/C
D, O
Reserved, do not connect
20
N/C
D, O
Reserved, do not connect
23
OEN
D, I, N Output enable: 0: enable, 1: disable
24
DOUT[0]
D, I/O
Data output bit 0 determines whether the sensor’s
HYSYNC and VSYNC signals will work under master
mode or slave mode. If pulled up, the sensor will output the
HYSNYC and VSYNC signals to the backend chip, which
is the master mode; if pulled down, the sensor will accept
the HSYNC and VYSNC signals from the backend chip to
control the sensor’s internal frame timing, which is the
slave mode.
25
DOUT[1]
D, I/O
Data output bit 1; if pull up or pull down is applied to this
pin, AD_IDL[0] (Sub ID) is 1 or 0 respectively.
26
DOUT[2]
D, I/O
Data output bit 2; if pull up or pull down is applied to this
pin, AD_IDL[1] (Sub ID) is 1 or 0 respectively.
27
DOUT[3]
D, I/O
Data output bit 3; if pull up or pull down is applied to this
pin, AD_IDL[2] (Sub ID) is 1 or 0 respectively.
28
DOUT[4]
D, I/O
Data output bit 4; if pull up or pull down is applied to this
pin, AD_IDL[3] (Sub ID) is 1 or 0 respectively.
31
DOUT[5]
D, I/O
Data output bit 5; if pull up or pull down is applied to this
pin, TIMING_CONTROL_LOW[1] (HSYNC polarity) is
1 or 0 respectively.
32
DOUT[6]
D, I/O
Data output bit 6; if pull up or pull down is applied to this
pin, the initial value of TIMING_CONTROL_LOW[2]
(VSYNC polarity) is 1 or 0 respectively.
33
DOUT[7]
D, O
Data output bit 7
34
DOUT[8]
D, O
Data output bit 8
35
DOUT[9]
D, O
Data output bit 9
36
DOUT[10]
D, O
Data output bit 10
37
SIF_SDA
D, I/O
SIF data
38
SIF_SCL
D, I/O
SIF clock
* _{Class Codes: A – analog signal, D – digital signal, I – input, O – output, P – power or ground, U – internal pull-up,}
N – internal pull-down, N/C – no connection.
Copyright 2004, IC Media Corporation
http://www.ic-media.com/
Page 9
9/22/2004