IA4420 Datasheet, PDF (19/29 Pages) List of Unclassifed Manufacturers – Universal ISM Band FSK Transceiver

IA4420
BASEBAND SIGNAL IN
ATGL**
ASAME***
fi
10MHz CLK
en
VDI*
a1 to a0
FINE
SEL
Y ^CLK
I0
/4
I1
MUX
ENABLE CALCULATION
AUTO OPERATION
Power-on reset
(POR)
rl1 to rl0
st
RANGE LIMIT
STROBE
oe
F<11:0>
OUTPUT ENABLE
Parameter from
Frequency control word
DIGITAL AFC
7
CORE LOGIC
singals for auto
operation modes
DIGITAL LIMITER
IF IN>MaxDEV THEN
OUT=MaxDEV
IF IN<MinDEV THEN
OUT=MinDEV
ELSE
OUT=IN
strobe
output enable
7 BIT
OFFS _{12 BIT}
<6:0>
FREQ.
7
OFFSET
REGISTER
ADDER
CLK CLR
Fcorr<11:0>
Corrected frequency
parameter to
synthesizer
NOTE:
* VDI (valid data indicator) is an internal signal of the
controller. See the Receiver Setting Command for details.
** ATGL: toggling in each measurement cycle
*** ASAME: logic high when the result is stable
Note: Lock bit is high when the AFC loop is locked, f_same bit indicates when two subsequent measuring results are the same, toggle bit
changes state in every measurement cycle.
In automatic operation mode (no strobe signal is needed from the microcontroller to update the output offset register) the AFC circuit is
automatically enabled when the VDI indicates potential incoming signal during the whole measurement cycle and the circuit measures the
same result in two subsequent cycles.
There are three operation modes, example from the possible application:
1, (a1=0, a0=1) The circuit measures the frequency offset only once after power up. In this way extended TX-RX maximum distance can be
achieved.
Possible application:
In the final application, when the user inserts the battery, the circuit measures and compensates for the frequency offset caused by the crystal
tolerances. This method allows for the use of a cheaper quartz in the application and provides protection against tracking an interferer.
2a, (a1=1, a0=0) The circuit automatically measures the frequency offset during an initial effective low data rate pattern –easier to receive-
(i.e.: 00110011) of the package and changes the receiving frequency accordingly. The further part of the package can be received by the
corrected frequency settings.
2b, (a1=1, a0=0) The transmitter must transmit the first part of the packet with a step higher deviation and later there is a possibility to reduce
it.
In both cases (2a and 2b), when the VDI indicates poor receiving conditions (VDI goes low), the output register is automatically cleared. Use
these settings when receiving signals from different transmitters transmitting in the same nominal frequencies.
3, (a1=1, a0=1) It’s the same as 2a and 2b modes, but suggested to use when a receiver operates with only one transmitter. After a complete
measuring cycle, the measured value is kept independently of the state of the VDI signal.
10. TX Configuration Control Command
Bit 15 14 13 12 11 10
100110
9876543
0 mp m3 m2 m1 m0 0
210
p2 p1 p0
POR
9800h
19