IA4420 Datasheet, PDF (16/29 Pages) List of Unclassifed Manufacturers – Universal ISM Band FSK Transceiver

IA4420
Bits 4-3 (g1 to g0): LNA gain select:
g1 g0
00
01
10
11
relative to maximum [dB]
0
-6
-14
-20
Bits 2-0 (r2 to r0): RSSI detector threshold:
r2 r1 r0 RSSI_setth [dBm]
000
-103
001
-97
010
-91
011
-85
100
-79
101
-73
110
-67
101
-61
The RSSI threshold depends on the LNA gain, the real RSSI threshold can be calculated:
RSSI_th=RSSI_setth+G_LNA
6. Data Filter Command
Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
1 1 0 0 0 0 1 0 al ml 1 s 1 f2 f1 f0
Bit 7 (al): Clock recovery (CR) auto lock control, if set.
CR will start in fast mode, then after locking it will automatically switch to slow mode.
Bit 6 (ml): Clock recovery lock control
1: fast mode, fast attack and fast release (6 to 8 bit preamble (1010...) is recommended)
0: slow mode, slow attack and slow release (12 to 16 bit preamble is recommended)
Using the slow mode requires more accurate bit timing (see Data Rate Command).
Bits 4 (s): Select the type of the data filter:
s
Filter Type
0
Digital filter
1
Analog RC filter
POR
C22Ch
Digital: This is a digital realization of an analog RC filter followed by a comparator with hysteresis. The time constant is automatically
adjusted to the bit rate defined by the Data Rate Command.
Note: Bit rate can not exceed 115 kpbs in this mode.
Analog RC filter: The demodulator output is fed to pin 7 over a 10 kOhm resistor. The filter cut-off frequency is set by the external
capacitor connected to this pin and VSS.
C = 1 / (3 * R * Bit Rate), therefore the suggested value for 9600 bps is 3.3 nF
Note: If analog RC filter is selected the internal clock recovery circuit and the FIFO can not be used.
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