BC41B143A-DS-002PD Datasheet, PDF (74/89 Pages) List of Unclassifed Manufacturers – BlueCore 4-ROM CSP EDR Single Chip Bluetooth v2.0 + EDR System

Device Terminal Descriptions
11.7.9 PCM Slave Timing
Symbol
Parameter
Min
Typ
Max Unit
f_sclk
PCM clock frequency (Slave mode: input)
64
f_sclk
PCM clock frequency (GCI mode)
128
t_sclkl
PCM_CLK low time
200
t_sclkh
PCM_CLK high time
200
t_hsclksynch
Hold time from PCM_CLK low to PCM_SYNC high
30
t_susclksynch
Set-up time for PCM_SYNC high to PCM_CLK low
30
t_dpout
Delay time from PCM_SYNC or PCM_CLK whichever is
later, to valid PCM_OUT data (Long Frame Sync only)
-
t_dsclkhpout
Delay time from CLK high to PCM_OUT valid data
-
t_dpoutz
Delay time from PCM_SYNC or PCM_CLK low, whichever
is later, to PCM_OUT data line high impedance
-
t_supinsclkl
Set-up time for PCM_IN valid to CLK low
30
t_hpinsclkl
Hold time for PCM_CLK low to PCM_IN invalid
30
-
2048 kHz
-
4096 kHz
-
-
ns
-
-
ns
-
-
ns
-
-
ns
-
20
ns
-
20
ns
-
20
ns
-
-
ns
-
ns
Table 11.10: PCM Slave Timing
PCM_CLK
f
sclk
t
sclkh
t
tsclkl
PCM_SYNC
t
hscl ksynch
t
suscl ksynch
PCM_OUT
t
dpout
MSB (LSB)
t
dsclkhpout
t ,t
rf
LSB (MSB)
t
dpoutz
t
dpoutz
PCM_IN
t
supinsclkl
t
hpi nscl kl
MSB (LSB)
LSB (MSB)
Figure 11.26: PCM Slave Timing Long Frame Sync
BC41B143A-ds-002Pd
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