BC41B143A-DS-002PD Datasheet, PDF (72/89 Pages) List of Unclassifed Manufacturers – BlueCore 4-ROM CSP EDR Single Chip Bluetooth v2.0 + EDR System

Device Terminal Descriptions
11.7.8 PCM Timing Information
Symbol
Parameter
Min
Typ
Max
Unit
4MHz DDS generation.
128
Selection of frequency is
programmable, see
-
256
Table 11.11
512
f_mclk
PCM_CLK frequency
48MHz DDS generation.
Selection of frequency is
programmable, see
2.9
Table 11.12 and
Section 11.7.10
-
PCM_SYNC frequency
-
8
t_mclkh(1)
PCM_CLK high
4MHz DDS generation
980
-
t_mclkl(1)
PCM_CLK low
4MHz DDS generation
730
-
-
PCM_CLK jitter
48MHz DDS generation
t_dmclksynch
Delay time from PCM_CLK high to PCM_SYNC
high
-
-
t_dmclkpout
Delay time from PCM_CLK high to valid PCM_OUT
-
-
t_dmclklsyncl
Delay time from PCM_CLK low to PCM_SYNC low
(Long Frame Sync only)
-
-
t_dmclkhsyncl
Delay time from PCM_CLK high to PCM_SYNC low
-
-
t_dmclklpoutz
Delay time from PCM_CLK low to PCM_OUT high
impedance
-
-
t_dmclkhpoutz
Delay time from PCM_CLK high to PCM_OUT high
impedance
-
-
t_supinclkl
Set-up time for PCM_IN valid to PCM_CLK low
30
-
t_hpinclkl
Hold time for PCM_CLK low to PCM_IN invalid
10
-
-
kHz
-
kHz
kHz
-
ns
ns
21
ns pk-pk
20
ns
20
ns
20
ns
20
ns
20
ns
20
ns
-
ns
-
ns
Table 11.9: PCM Master Timing
Note:
(1) _{Assumes normal system clock operation. Figures will vary during low power modes, when system clock}
speeds are reduced.
BC41B143A-ds-002Pd
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