BC41B143A-DS-002PD Datasheet, PDF (67/89 Pages) List of Unclassifed Manufacturers – BlueCore 4-ROM CSP EDR Single Chip Bluetooth v2.0 + EDR System

Device Terminal Descriptions
11.6.2 Writing to BlueCore4-ROM CSP
To write to BlueCore4-ROM CSP, the 8-bit write command (00000010) is sent first (C[7:0]) followed by a 16-bit
address (A[15:0]). The next 16 bits (D[15:0]) clocked in on SPI_MOSI are written to the location set by the
address A[15:0]. Thereafter for each subsequent 16 bits clocked in, the address A[15:0] is incremented and the
data written to consecutive locations until the transaction terminates when SPI_CSB is taken high.
SPI_CSB
Reset
Write_Command
Address(A)
Data(A)
Data(A+1)
End of Cycle
etc
SPI_CLK
SPI_MOSI
C7 C6
C1 C0 A15 A14
A1 A0 D15 D14
D1 D0 D15 D14
D1 D0 D15 D14
D1 D0
Don't Care
SPI_MISO
Processor
State
MISO Not Defined During Write
Figure 11.15: Write Operation
Processor
State
11.6.3 Reading from BlueCore4-ROM CSP
Reading from BlueCore4-ROM CSP is similar to writing to it. An 8-bit read command (00000011) is sent first
(C[7:0]), followed by the address of the location to be read (A[15:0]). BlueCore4-ROM CSP then outputs on
SPI_MISO a check word during T[15:0] followed by the 16-bit contents of the addressed location during bits
D[15:0].
The check word is composed of C[7:0], A[15:8]. The check word can be used to confirm a read operation to a
memory location. This overcomes the problems encountered with typical serial peripheral interface slaves, where
it is impossible to determine whether the data returned by a read operation is valid data or the result of the slave
device not responding.
If SPI_CSB is kept low, data from consecutive locations is read out on SPI_MISO for each subsequent 16 clocks,
until the transaction terminates when SPI_CSB is taken high.
SPI_CSB
Reset
Read_Command
Address(A)
Check_Word
Data(A)
Data(A+1)
End of Cycle
etc
SPI_CLK
SPI_MOSI
C7 C6
C1 C0 A15 A14
A1 A0
Don't Care
SPI_MISO
Processor
State
MISO Not Defined During Address
T15 T14
T1 T0 D15 D14
D1 D0 D15 D14
Figure 11.16: Read Operation
D1 D0 D15 D14
D1 D0
Processor
State
11.6.4 Multi-Slave Operation
BlueCore4-ROM CSP should not be connected in a multi-slave arrangement by simple parallel connection of
slave MISO lines. When BlueCore4-ROM CSP is deselected (SPI_CSB = 1), the SPI_MISO line does not float.
Instead, BlueCore4-ROM CSP outputs 0 if the processor is running or 1 if it is stopped.
BC41B143A-ds-002Pd
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