BC41B143A-DS-002PD Datasheet, PDF (18/89 Pages) List of Unclassifed Manufacturers – BlueCore 4-ROM CSP EDR Single Chip Bluetooth v2.0 + EDR System

Electrical Characteristics
Input/Output Terminal Characteristics (Continued)
Crystal Oscillator
Crystal frequency ⁽¹⁾
Digital trim range ⁽²⁾
Trim step size ⁽²⁾
Transconductance
Negative resistance⁽³⁾
Minimum
8.0
5.0
-
2.0
870
Typical
-
6.2
0.1
-
1500
Maximum
40.0
8.0
-
-
2400
Unit
MHz
pF
pF
mS
Ω
External Clock
Input frequency⁽⁴⁾
Clock input level⁽⁵⁾
Allowable jitter
XTAL_IN input impedance
XTAL_IN input capacitance
8.0
-
40.0
MHz
0.4
-
VDD_ANA V pk-pk
-
-
15
ps rms
-
≥10
-
kΩ
-
≤4
-
pF
Notes:
VDD_CORE, VDD_RADIO, VDD_LO and VDD_ANA are at 1.8V unless shown otherwise.
VDD_PADS, VDD_PIO and VDD_USB are at 3.0V unless shown otherwise.
The same setting of the digital trim is applied to both XTAL_IN and XTAL_OUT.
Current drawn into a pin is defined as positive; current supplied out of a pin is defined as negative.
(1) _{Integer multiple of 250kHz.}
(2) _{The difference between the internal capacitance at minimum and maximum settings of the internal}
digital trim.
(3) _{XTAL frequency = 16MHz; XTAL C0 = 0.75pF; XTAL load capacitance = 8.5pF.}
(4) _{Clock input can be any frequency between 8 and 40MHz in steps of 250kHz and also covers the}
CDMA/3G TCXO frequencies of 7.68, 14.44, 15.36, 16.2, 16.8, 19.2, 19.44, 19.68, 19.8 and 38.4MHz.
(5) _{Clock input can either be sinusoidal or square wave. If the peaks of the signal are below VSS_ANA or}
above VDD_ANA a DC blocking capacitor is required between the signal and XTAL_IN.
BC41B143A-ds-002Pd
This material is subject to CSR’s non-disclosure agreement
Production Information
© Cambridge Silicon Radio Limited 2005
Page 18 of 89