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BC352239A Datasheet, PDF (5/116 Pages) List of Unclassifed Manufacturers – BlueCore 3-Multimedia External
Contents
List of Figures
Figure 2.1: BlueCore3-Multimedia External Device Pinout ..................................................................................... 9
Figure 5.1: BlueCore3-Multimedia External Device Diagram ................................................................................ 29
Figure 6.1: Kalimba DSP Interface to Internal Functions ...................................................................................... 33
Figure 6.2: Audio Interface .................................................................................................................................... 34
Figure 7.1: BlueCore HCI Stack ............................................................................................................................ 35
Figure 7.2: Kalimba DSP Stack............................................................................................................................. 38
Figure 8.1: Circuit TX/RX_A and TX/RX_B ........................................................................................................... 40
Figure 8.2: TX_A Output at Power Setting 35 ....................................................................................................... 41
Figure 8.3: TX_A Output at Power Setting 50 ....................................................................................................... 41
Figure 8.4: TX_A Output at Power Setting 63 ....................................................................................................... 42
Figure 8.5: TX_B Output at Power Setting 35 ....................................................................................................... 42
Figure 8.6: TX_B Output at Power Setting 50 ....................................................................................................... 43
Figure 8.7: TX_B Output at Power Setting 63 ....................................................................................................... 43
Figure 8.8: RX_A Balanced Receive Input Impedance ......................................................................................... 44
Figure 8.9: RX_B Balanced Receive Input Impedance ......................................................................................... 44
Figure 8.10: First Stage of ADC Analogue Amplifier Block Diagram ..................................................................... 74
Figure 8.11: BlueCore3-Multimedia External as PCM Interface Master ................................................................ 78
Figure 8.12: BlueCore3-Multimedia External as PCM Interface Slave .................................................................. 78
Figure 8.13: Long Frame Sync (Shown with 8-bit Companded Sample)............................................................... 79
Figure 8.14: Short Frame Sync (Shown with 16-bit Sample) ................................................................................ 79
Figure 8.15: Multi Slot Operation with Two Slots and 8-bit Companded Samples ................................................ 80
Figure 8.16: GCI Interface..................................................................................................................................... 80
Figure 8.17: 16-Bit Slot Length and Sample Formats ........................................................................................... 81
Figure 8.18: PCM Master Timing Long Frame Sync ............................................................................................. 83
Figure 8.19: PCM Master Timing Short Frame Sync............................................................................................. 83
Figure 8.20: PCM Slave Timing Long Frame Sync ............................................................................................... 85
Figure 8.21: PCM Slave Timing Short Frame Sync .............................................................................................. 85
Figure 8.22: Digital Audio Interface Modes ........................................................................................................... 89
Figure 8.23: Digital Audio Interface Slave Timing ................................................................................................. 90
Figure 8.24: Digital Audio Interface Master Timing ............................................................................................... 91
Figure 8.25: Example Circuit for SPDIF Interface with Coaxial Output ................................................................. 92
Figure 8.26: Example Circuit for SPDIF Interface with Coaxial Input .................................................................... 92
Figure 8.27: Example Circuit for SPDIF Interface with Optical Output .................................................................. 93
Figure 8.28: Example Circuit for SPDIF Interface with Optical Input ..................................................................... 93
Figure 8.29: Microphone Biasing (Left Channel Shown) ....................................................................................... 94
Figure 8.30: Differential Input (Left Channel Shown) ............................................................................................ 94
Figure 8.31: Single Ended Input (Left Channel Shown) ........................................................................................ 94
Figure 8.32: Speaker Output (Left Channel Shown) ............................................................................................. 95
Figure 8.33: Example EEPROM Connection ........................................................................................................ 96
Figure 8.34: Example TXCO Enable OR Function ................................................................................................ 97
Figure 10.10.1: Relative Level of 2nd Harmonic to Fundamental, PL = 600Ω....................................................... 100
Figure 10.10.2: Relative Level of 3rd Harmonic to Fundamental, PL = 600Ω ...................................................... 101
Figure 10.10.3: Relative Level of 2nd Harmonic to Fundamental, PL = 32Ω......................................................... 102
Figure 10.10.4: Relative Level of 3rd Harmonic to Fundamental, PL = 32Ω ......................................................... 103
Figure 10.10.5: Relative Level of 2nd Harmonic to Fundamental, PL = 22Ω......................................................... 104
BC352239A-ds-001Pc
© Cambridge Silicon Radio Limited 2004
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