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BC352239A Datasheet, PDF (49/116 Pages) List of Unclassifed Manufacturers – BlueCore 3-Multimedia External
Device Terminal Descriptions
8.2 External Reference Clock Input (XTAL_IN)
The BlueCore3-Multimedia External RF local oscillator and internal digital clocks are derived from the reference
clock at the BlueCore3-Multimedia External XTAL_IN input. This reference may be either an external clock or
from a crystal connected between XTAL_IN and XTAL_OUT. The crystal mode is described in Section 8.3.
8.2.1 External Mode
BlueCore3-Multimedia External can be configured to accept an external reference clock (from another device,
such as TCXO) at XTAL_IN by connecting XTAL_OUT to ground. The external clock can either be a digital level
square wave or sinusoidal and this may be directly coupled to XTAL_IN without the need for additional
components. If the peaks of the reference clock are below VSS_ANA or above VDD_ANA, it must be driven
through a DC blocking capacitor (~33pF) connected to XTAL_IN. A digital level reference clock gives superior
noise immunity as the high slew rate clock edges have lower voltage to phase conversion.
The external clock signal should meet the specifications in Table 8.4.
Frequency(1)
Duty cycle
Edge Jitter (At Zero Crossing)
Signal Level
Minimum
Typical
7.5MHz
20:80
-
400mV pk-pk
16MHz
50:50
-
-
Table 8.4: External Clock Specifications
Maximum
40MHz
80:20
15ps rms
VDD_ANA(2)(3)
Notes:
(1)
(2)
(3)
The frequency should be an integer multiple of 250kHz except for the CDMA/3G frequencies.
VDD_ANA is 1.8V nominal.
If the external clock driven through a DC blocking capacitor then maximum allowable amplitude is
reduced from VDD_ANA to 800mV pk-pk.
8.2.2 XTAL_IN Impedance in External Mode
The impedance of the XTAL_IN will not change significantly between operating modes, typically 10fF. When
transitioning from deep sleep to an active state a spike of up to 1pC may be measured. For this reason it is
recommended that a buffered clock input be used.
8.2.3 Clock Timing Accuracy
As Figure 8. indicates, the 250ppm timing accuracy on the external clock is required 7ms after the assertion of
the system clock request line. This is to guarantee that the firmware can maintain timing accuracy in accordance
with the Bluetooth v1.2 specification. Radio activity may occur after 11ms, therefore at this point, the timing
accuracy of the external clock source must be within 20ppm.
BC352239A-ds-001Pc
Figure 8.11: TCXO Clock Accuracy
© Cambridge Silicon Radio Limited 2004
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