VS1103B Datasheet, PDF (44/61 Pages) List of Unclassifed Manufacturers – MIDI/ADPCM AUDIO CODEC

VLSI
Solution ^y
VS1103b
VS1103B
7. OPERATION
7.8.3 Memory Test
Memory test mode is initialized with the 8-byte sequence 0x4D 0xEA 0x6D 0x54 0 0 0 0. After this
sequence, wait for 500000 clock cycles. The result can be read from the SCI register SCI IN0, and ’one’
bits are interpreted as follows:
Bit(s)
15
14:7
6
5
4
3
2
1
0
Mask
0x8000
0x0040
0x0020
0x0010
0x0008
0x0004
0x0002
0x0001
0x807f
Meaning
Test finished
Unused
Mux test succeeded
Good I RAM
Good Y RAM
Good X RAM
Good I ROM
Good Y ROM
Good X ROM
All ok
Memory tests overwrite the current contents of the RAM memories.
7.8.4 SCI Test
Sci test is initialized with the 8-byte sequence 0x53 0x70 0xEE n 0 0 0 0, where n − 48 is the register
number to test. The content of the given register is read and copied to SCI IN0. If the register to be
tested is SCI IN0, the result is copied to SCI IN1.
Example: if n is 48, contents of SCI register 0 (SCI MODE) is copied to SCI IN0.
Version 1.01, 2007-09-03
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