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VS1103B Datasheet, PDF (13/61 Pages) List of Unclassifed Manufacturers – MIDI/ADPCM AUDIO CODEC
VLSI
Solution y
VS1103b
VS1103B
4. PACKAGES AND PIN DESCRIPTIONS
4.2 LQFP-48 and BGA-49 Pin Descriptions
Pin Name
LQFP-
48 Pin
MICP
1
MICN
2
XRESET
3
DGND0
4
CVDD0
5
IOVDD0
6
CVDD1
7
DREQ
8
GPIO2 / DCLK1 9
GPIO3 / SDATA1 10
XDCS / BSYNC1 13
IOVDD1
14
VCO
15
DGND1
16
XTALO
17
XTALI
18
IOVDD2
19
IOVDD3
DGND2
20
DGND3
21
DGND4
22
XCS
23
CVDD2
24
RX
26
TX
27
SCLK
28
SI
29
SO
30
CVDD3
31
TEST
32
GPIO0 / SPIBOOT 33
BGA49
Ball
C3
C2
B1
D2
C1
D3
D1
E2
E1
F2
E3
F3
G2
F4
G3
E4
G4
F5
G5
F6
G6
G7
E6
F7
D6
E7
D5
D7
C6
C7
Pin
Type
AI
AI
DI
DGND
CPWR
IOPWR
CPWR
DO
DIO
DIO
DI
IOPWR
DO
DGND
AO
AI
IOPWR
IOPWR
DGND
DGND
DGND
DI
CPWR
DI
DO
DI
DI
DO3
CPWR
DI
DIO
GPIO1
AGND0
AVDD0
RIGHT
AGND1
AGND2
GBUF
AVDD1
RCAP
AVDD2
LEFT
AGND3
LINEIN
34
B6
DIO
37
C5
APWR
38
B5
APWR
39
A6
AO
40
B4
APWR
41
A5
APWR
42
C4
AO
43
A4
APWR
44
B3
AIO
45
A3
APWR
46
B2
AO
47
A2
APWR
48
A1
AI
Function
Positive differential microphone input, self-biasing
Negative differential microphone input, self-biasing
Active low asynchronous reset
Core & I/O ground
Core power supply
I/O power supply
Core power supply
Data request, input bus
General purpose IO 2 / serial input data bus clock
General purpose IO 3 / serial data input
Data chip select / byte sync
I/O power supply
For testing only (Clock VCO output)
Core & I/O ground
Crystal output
Crystal input
I/O power supply
I/O power supply
Core & I/O ground
Core & I/O ground
Core & I/O ground
Chip select input (active low)
Core power supply
UART receive, connect to IOVDD if not used
UART transmit
Clock for serial bus
Serial input
Serial output
Core power supply
Reserved for test, connect to IOVDD
General purpose IO 0 / SPIBOOT, use 100 kΩ pull-down
resistor2
General purpose IO 1
Analog ground, low-noise reference
Analog power supply
Right channel output
Analog ground
Analog ground
Common buffer for headphones
Analog power supply
Filtering capacitance for reference
Analog power supply
Left channel output
Analog ground
Line input
1 First pin function is active in New Mode, latter in Compatibility Mode.
2 Unless pull-down resistor is used, SPI Boot is tried. See Chapter 7.5 for details.
Version 1.01, 2007-09-03
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