LM3S316 Datasheet, PDF (321/421 Pages) List of Unclassifed Manufacturers – Microcontroller

Figure 14-13. Slave Command Sequence
LM3S316 Data Sheet
Idle
Write OWN Slave
Address to
I2CSOAR
Write ------- 1
to I2CSCSR
Read I2CSCSR
NO _{TREQ bit=1?}
YES
Write data to
I2CSDR
NO _{RREQ bit=1?}
FBR is
also valid
YES
Read data from
I2CSDR
14.2.2
Available Speed Modes
The SCL clock rate is determined by the parameters: CLK_PRD, TIMER_PRD, SCL_LP, and
SCL_HP.
where:
CLK_PRD is the system clock period
SCL_LP is the Low phase of the SCL clock (fixed at 6)
SCL_HP is the High phase of the SCL clock (fixed at 4)
TIMER_PRD is the programmed value in the I2C Master Timer Period (I2CMTPR) register (see
page 331).
The SCL clock period is calculated as follows:
SCL_PERIOD = 2*(1 + TIMER_PRD)*(SCL_LP + SCL_HP)*CLK_PRD
April 27, 2007
321
Preliminary