L64105 Datasheet, PDF (268/454 Pages) List of Unclassifed Manufacturers – AUDIO/VIDEO DECODER

8.3.2 Video Decoder Start/Stop
The actual start of decoding should be delayed from the start of the
channel. This is done to allow the Video ES Channel Buffer to fill to a
sufficient level so that there is no underflow/overflow of the buffer while
actually reconstructing pictures. The host may choose one of the
methods described in ISO/IEC 11172 (MPEG-1) and ISO/IEC 13818
(MPEG-2) to determine how long this delay should be. See also Section
6.4.2, “Detecting Potential Underflow Conditions in the Video Channel,”
page 6-29.
The Postparser in the Video Decoder Module actually starts its parsing
operation as soon as there is data in the Video ES Channel Buffer. The
Postparser ignores bits from the buffer until it recognizes the first
sequence start code. This is done so that the Video Decoder can
resynchronize to the data in cases where a program has been changed
(video stream ID changed) between sequence start codes. During this
time, Picture Start Code Interrupts may occur for each skipped picture
before the sequence start code is found.
After finding the first sequence start code, the Postparser then proceeds
to read header data for the sequence layer, sequence extensions (if any),
group of pictures layer, user data, picture layer, and picture layer
extensions (if any). The Postparser stops parsing bits at the first picture
data boundary (i.e., it reads the picture header) and waits for the Decode
Start Command if it has not yet been issued.
No data is written to the Auxiliary Data FIFO while the Postparser is
resyncing to the first sequence start code.
The host can start the Video Decoder in one of two ways:
1. Setting the Decode Start/Stop Command bit in Register 246
(page 4-57).
2. Using the video autostart feature. This is done by writing an SCR
Compare/Capture Value to Registers 13 through 16, setting the SCR
Compare/Capture Mode bits in Register 17 to Compare mode
(0b01), and setting the Video Start on Compare bit in Register 19.
When the SCR counter catches up to and equals the value in the
SCR Compare/Capture registers, the Decode Start Command is
issued automatically. This feature can be used to synchronize the
start of video decode with the Decode Time Stamps (DTSs) in the
video PES headers preparsed from the bitstream.
8-26
Video Decoder Module