L64105 Datasheet, PDF (105/454 Pages) List of Unclassifed Manufacturers – AUDIO/VIDEO DECODER

Interface of the L64105 converts the address to an SDRAM address at
a 256-byte boundary in SDRAM. This register should only be updated
while the channel is stopped (reset).
Figure 4.24 Registers 74 and 75 (0x04A and 0x04B) Video ES Channel Buffer End
Address [13:0]
Reg. 74
LSB
Reg. 75
MSB
7
6
Reserved
5
0
Video ES Channel Buffer End Address [7:0]
R/W
Video ES Channel Buffer End Address [13:8]
R/W
These registers allow the host to program the Video ES channel buffer
end address. The address is entered as if it were the upper 14 bits of a
21-bit address for a conventional 2M x 16 RAM address. The Memory
Interface of the L64105 converts the address to an SDRAM address at
a 256-byte boundary in SDRAM. This register should only be updated
while the channel is stopped (reset).
Figure 4.25 Registers 76 and 77 (0x04C and 0x04D) Audio ES Channel Buffer Start
Address [13:0]
Reg. 76
LSB
Reg. 77
MSB
7
6
Reserved
5
0
Audio ES Channel Buffer Start Address [7:0]
R/W
Audio ES Channel Buffer Start Address [13:8]
R/W
These registers allow the host to program the Audio ES channel buffer
start address. The address is entered as if it were the upper 14 bits of a
21-bit address for a conventional 2M x 16 RAM address. The Memory
Interface of the L64105 converts the address to an SDRAM address at
a 256-byte boundary in SDRAM. This register should only be updated
while the channel is stopped (reset).
Video Decoder Registers
4-23