W3150 Datasheet, PDF (22/59 Pages) List of Unclassifed Manufacturers – WIZnet’s Online Technical Support

PPPoE Close
5 PPPoE In the PPPoE Mode, if the PPPoE connection is closed, ‘1’ is set. This bit will be cleared
to ‘0’ only with Read action.
4 Reserved Reserved
Occurrence of Socket 3 Socket Interrupt
It is set in case that interrupt occurs at the socket 3. For more detailed information of
3 S3_INT
socket interrupt, refer to “Socket 3 Interrupt Register(S3_IR). This bit will be automatically
cleared when S3_IR is cleared to 0x00.
Occurrence of Socket 2 Socket Interrupt
It is set in case that interrupt occurs at the socket 2. For more detailed information of
2 S2_INT
socket interrupt, refer to “Socket 2 Interrupt Register(S2_IR). This bit will be automatically
cleared when S2_IR is cleared to 0x00.
Occurrence of Socket 1 Socket Interrupt
It is set in case that interrupt occurs at the socket 1. For more detailed information of
1 S1_INT
socket interrupt, refer to “Socket 1 Interrupt Register(S1_IR). This bit will be automatically
cleared when S1_IR is cleared to 0x00.
Occurrence of Socket 0 Socket Interrupt
It is set in case that interrupt occurs at the socket 0. For more detailed information of
0 S0_INT
socket interrupt, refer to “Socket 0 Interrupt Register(S0_IR). This bit will be automatically
cleared when S0_IR is cleared to 0x00.
IMR (Interrupt Mask Register) [R/W] [0x0016] [0x00]
The Interrupt Mask Register is used to mask interrupts. Each interrupt mask bit corresponds to a bit in the
Interrupt Register (IR). If an interrupt mask bit is set, an interrupt will be issued whenever the corresponding
bit in the IR is set. If any bit in the IMR is set as ‘0’, an interrupt will not occur though the bit in the IR is set.
7
6
5
4
3
2
1
0
IM_IR7
IM_IR6
IM_IR5 Reserved IM_IR3
IM_IR2
IM_IR1
IM_IR0
Bit Symbol
Description
7 IM_IR7 IP Conflict Enable
6 IM_IR6 Destination unreachable Enable
5 IM_IR5 PPPoE Close Enable
4 Reserved It should be set as ‘0’
3 IM_IR3 Occurrence of Socket 3 Socket Interrupt Enable
2 IM_IR2 Occurrence of Socket 2 Socket Interrupt Enable
1 IM_IR1 Occurrence of Socket 1 Socket Interrupt Enable
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