W3150 Datasheet, PDF (10/59 Pages) List of Unclassifed Manufacturers – WIZnet’s Online Technical Support

1.2. MCU Interface Signal Description
Pin#
1
35
5:11
14:21
24:27,
29:32
61
64
62
63
Signal
/RESET
CLOCK
A[14:8]
A[7:0]
D[7:4]
D[3:0]
/INT
/CS
/WR
/RD
I/O
Description
RESET
Active Low input that initializes or re-initializes W3150.
I
Asserting this pin low for at least 125us will force a reset process to occur
which will result in all internal registers re-initializing to their default states.
CLOCK
This pin is the Primary clock required for internal operation of W3150. In
general, PHY driving clock can be shared for saving cost. 25MHz is required.
I Note) Sharing crystal source clock with multiple devices may cause some
troubles. In our reference design, we used one crystal for both PHY and
W3150 with verification.
But for other kind of PHY, please confirm safety prior to decision.
I ^{ADDRESS PINS}
These pins are used to select a register or memory.
DATA PINS
I/O
These pins are used to read and write register or memory data.
INTERRUPT
This pin Indicates that W3150 requires MCU attention after socket
O connecting, disconnecting, receiving data or timeout. The interrupt is cleared
by reading IR(Interrupt Register) or Sn_IR (Socket nth Interrupt Register). All
interrupts are maskable. This signal is active low.
CHIP SELECT
I Chip Select places for MCU access to internal registers/memory. /WR and
/RD select direction of data transfer. This signal is active low.
WRITE ENABLE
Strobe from MCU to write an internal register/memory selected by A[14:0].
I
Data is latched into the W3150 on the rising edge of this input. This signal is
active low.
READ ENABLE
I Strobe from MCU to read an internal register/memory selected by A[14:0].
This signal is active low.
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